參數(shù)資料
型號(hào)： EVAL-AD7856CB
廠商： Analog Devices, Inc.
英文描述： 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC
中文描述： 5 V單電源，8通道14位285 kSPS的采樣ADC
文件頁(yè)數(shù)： 3/32頁(yè)
文件大小： 294K
代理商： EVAL-AD7856CB
–3–
REV. A
AD7856
Parameter
A Version
1
K Version
1
Units
Test Conditions/Comments
POWER PERFORMANCE
AV
DD,
DV
DD
I
DD
Normal Mode
5
Sleep Mode
6
With External Clock On
+4.75/+5.25
+4.75/+5.25
V min/max
17
17
mA max
AV
DD
= DV
DD
= 4.75 V to 5.25 V. Typically 12 mA
30
10
μ
A typ
Full Power-Down. Power Management Bits in Con-
trol Register Set as PMGT1 = 1, PMGT0 = 0
Partial Power-Down. Power Management Bits in
Control Register Set as PMGT1 = 1, PMGT0 = 1
Typically 0.5
μ
A. Full Power-Down. Power Manage-
ment. Bits in Control Register Set as PMGT1 = 1,
PMGT0 = 0
Partial Power-Down. Power Management Bits in
Control Register Set as PMGT1 = 1, PMGT0 = 1
V
DD
= 5.25 V. Typically 60 mW;
SLEEP
= V
DD
400
500
μ
A typ
With External Clock Off
5
5
μ
A max
200
200
μ
A typ
Normal Mode Power Dissipation
Sleep Mode Power Dissipation
With External Clock On
With External Clock Off
89.25
89.25
mW max
52.5
26.25
52.5
26.25
μ
W typ
μ
W max
V
DD
= 5.25 V.
SLEEP
= 0 V
V
DD
= 5.25 V. Typically 5.25
μ
W;
SLEEP
= 0 V
SYSTEM CALIBRATION
Offset Calibration Span
7
Gain Calibration Span
7
+0.0375
×
V
REF
/–0.0375
×
V
REF
+1.01875
×
V
REF
/–0.98125
×
V
REF
V max/min
V max/min
Allowable Offset Voltage Span for Calibration
Allowable Full-Scale Voltage Span for Calibration
NOTES
1
Temperature ranges as follows: A Version: –40
°
C to +105
°
C. K Version: 0
°
C to +105
°
C.
2
Specifications apply after calibration.
3
SNR calculation includes distortion and noise components.
4
Sample tested @ +25
°
C to ensure compliance.
5
All digital inputs @ DGND except for
CONVST
,
SLEEP
,
CAL
and
SYNC
@ DV
DD
. No load on the digital outputs. Analog inputs @ AGND.
6
CLKIN @ DGND when external clock off. All digital inputs @ DGND except for
CONVST
,
SLEEP
,
CAL
, and
SYNC
@ DV
DD
. No load on the digital outputs.
Analog inputs @ AGND.
7
The Offset and Gain Calibration Spans are defined as the range of offset and gain errors that the AD7856 can calibrate. Note also that these are voltage spans and are
not absolute voltages (i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–)
±
0.0375
×
V
REF
, and
the allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be V
REF
±
0.01875
×
V
REF
).
This is explained in more detail in the Calibration section of the data sheet.
Specifications subject to change without notice.
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