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參數(shù)資料
| 型號(hào)： | EVAL-AD7856CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| 中文描述： | 5 V單電源，8通道14位285 kSPS的采樣ADC |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 294K |
| 代理商： | EVAL-AD7856CB |
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–2–
REV. A
AD7856–SPECIFICATIONS
1, 2
REF
IN
/REF
OUT
= 4.096 V External Reference unless otherwise noted,
SLEEP
= Logic High; T
A
= T
MIN
to T
MAX
, unless otherwise noted.) Specifica-
tions apply for Mode 2 operation, standard 3-wire SPI interface; refer to Detailed Timing section for Mode 1 Specifications.
Parameter
A Version
1
K Version
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio
3
(SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Second Order Terms
Third Order Terms
Channel-to-Channel Isolation
f
IN
= 10 kHz
79.5 dB typ
–95 dB typ
–95 dB typ
78
–86
–87
78
–86
–87
dB min
dB max
dB max
–86
–86
–90
–90
–90
–90
dB typ
dB typ
dB typ
fa = 9.983 kHz, fb = 10.05 kHz
fa = 9.983 kHz, fb = 10.05 kHz
V
IN
= 25 kHz
DC ACCURACY
Resolution
Integral Nonlinearity
Any Channel
14
14
±
2
Bits
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
LSB typ
LSB max
4.096 V External Reference, V
DD
= 5 V
±
2
Differential Nonlinearity
±
2
Guaranteed No Missed Codes to 13 Bits.
±
2
Offset Error
±
10
±
5
±
3
±
10
±
10
Offset Error Match
Positive Full-Scale Error
±
10
Positive Full-Scale Error Match
±
2
ANALOG INPUT
Input Voltage Ranges
0 to V
REF
0 to V
REF
Volts
i.e., AIN(+) – AIN(–) = 0 to V
REF
, AIN(–) Can Be
Biased Up, but AIN(+) Cannot Go Below AIN(–)
Leakage Current
Input Capacitance
±
1
20
±
1
20
μ
A max
pF typ
REFERENCE INPUT/OUTPUT
REF
IN
Input Voltage Range
Input Impedance
REF
OUT
Output Voltage
REF
OUT
Tempco
4.096/V
DD
150
3.696/4.496
20
2.3/V
DD
150
3.696/4.496
20
V min/max
k
typ
V min/max
ppm/
°
C typ
Functional from 1.2 V
Resistor Connected to Internal Reference Node
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
V
DD
– 1.0
0.4
±
1
10
V
DD
– 1.0
0.4
±
1
10
V min
V max
μ
A max
pF max
Typically 10 nA, V
IN
= 0 V or V
DD
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
4
Output Coding
V
DD
– 0.4
0.4
±
1
10
Straight (Natural) Binary
V
DD
– 0.4
0.4
±
1
10
V min
V max
μ
A max
pF max
I
SOURCE
= 200
μ
A
I
SINK
= 0.8 mA
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
3.5
0.33
5.25
0.5
μ
s max
μ
s min
21 CLKIN Cycles
A Grade: f
CLKIN
= 6 MHz, (–40
8
C to +105
8
C), f
SAMPLE
= 285 kHz; K Grade:
f
CLKIN
= 4 MHz, (0
8
C to +105
8
C), f
SAMPLE
= 102 kHz; (AV
DD
= DV
DD
= +5.0 V
6
5%,
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