- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362802 > EVAL-AD7853CB (Analog Devices, Inc.) 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-AD7853CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| 中文描述： | 3 V至5 V單電源，200 kSPS的12位采樣ADC |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 350K |
| 代理商： | EVAL-AD7853CB |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
REV. B
–5–
AD7853/AD7853L
TYPICAL TIMING DIAGRAMS
Figures 2 and 3 show typical read and write timing diagrams.
Figure 2 shows the reading and writing after conversion in In-
terface Modes 2 and 3. To attain the maximum sample rate of
100 kHz (AD7853L) or 200 kHz (AD7853) in Interface Modes
2 and 3, reading and writing must be performed during conver-
sion. Figure 3 shows the timing diagram for Interface Modes 4
and 5 with sample rate of 100 kHz (AD7853L) or 200 kHz
(AD7853). At least 400 ns acquisition time must be allowed
(the time from the falling edge of BUSY to the next rising edge
of
CONVST
) before the next conversion begins to ensure that
the part is settled to the 12-bit level. If the user does not want to
provide the
CONVST
signal, the conversion can be initiated in
software by writing to the control register.
TO OUTPUT
PIN
+2.1V
I
OH
1.6mA
200
m
A
I
OL
C
L
100pF
Figure 1. Load Circuit for Digital Output Timing
Specifications
POLARITY PIN LOGIC HIGH
SYNC
(I/P)
SCLK (I/P)
t
3
BUSY (O/P)
CONVST
(I/P)
t
2
t
1
t
5
t
11
t
6
t
9
t
10
1
5
6
16
t
12
t
6
DOUT (O/P)
DB0
DB11
t
8
DB15
DB0
THREE-
STATE
DB11
THREE-
STATE
DB15
t
CONVERT
t
7
t
CONVERT
= 4.6
m
s MAX, 10
m
s FOR L VERSION
t
1
= 100 ns MIN,
t
5
= 50/90 ns MAX 5V/3V,
t
7
= 40/60 ns MIN 5V/3V
Figure 2. AD7853/AD7853L Timing Diagram (Typical Read and Write Operation for Interface Modes 2, 3)
POLARITY PIN LOGIC HIGH
SYNC
(O/P)
DOUT (O/P)
SCLK (O/P)
DB0
DB11
t
4
t
8
DIN (I/P)
DB15
DB0
THREE-
STATE
BUSY (O/P)
CONVST
(I/P)
DB11
t
2
t
1
t
7
t
11
t
6
t
9
t
10
THREE-
STATE
1
5
6
16
t
12
t
5
DB15
t
CONVERT
t
CONVERT
= 4.6
m
s MAX, 10
m
s FOR L VERSION
t
1
= 100 ns MIN,
t
5
= 50/90 ns MAX 5V/3V,
t
7
= 40/60 ns MIN 5V/3V
Figure 3. AD7853/AD7853L Timing Diagram (Typical Read and Write Operation for Interface Modes 4, 5)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EVAL-AD7854CB | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| EVAL-AD7856CB | 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| EVAL-AD7858CB | 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC |
| EVAL-AD7859CB | 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs |
| EVAL-AD7866CB | Dual 1 MSPS, 12-Bit, 2-Channel SAR ADC with Serial Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7854CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7856CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| EVAL-AD7858CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7858CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC |
| EVAL-AD7859CB | 制造商:Analog Devices 功能描述:Evaluation Board For 3V To 5V, 12-Bit 200KSPS, Multi-Channel, Sampling ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。