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參數(shù)資料
| 型號： | EVAL-AD7853CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| 中文描述： | 3 V至5 V單電源，200 kSPS的12位采樣ADC |
| 文件頁數(shù)： | 10/34頁 |
| 文件大小： | 350K |
| 代理商： | EVAL-AD7853CB |
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REV. B
–10–
AD7853/AD7853L
CONTROL REGISTER
The arrangement of the control register is shown below. The control register is a write only register and contains 14 bits of data. The
control register is selected by putting two 1s in ADDR1 and ADDR0. The function of the bits in the control register are described
below. The power-up status of all bits is 0.
MSB
ZERO
ZERO
ZERO
ZERO
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
CONVST
CALMD
CALSLT1
CALSLT0
STCAL
LSB
Control Register Bit Function Descriptions
Bit
Mnemonic
Comment
13
12
11
10
9
8
7
6
5
ZERO
ZERO
ZERO
ZERO
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
These four bits must be set to 0 when writing to the control register.
Power Management Bits. These two bits are used with the
SLEEP
pin for putting the part into various
power-down modes (See Power-Down section for more details).
These two bits determine which register is addressed for the read operations. See Table II.
Interface Mode Select Bit. With this bit set to 0, Interface Mode 2 is enabled. With this bit set to 1,
Interface Mode 1 is enabled where DIN is used as an output as well as an input. This bit is set to 0 by
default after every read cycle; thus when using Interface Mode 1, this bit needs to be set to 1 in every
write cycle.
Conversion Start Bit. A logic one in this bit position starts a single conversion, and this bit is automati-
cally reset to 0 at the end of conversion. This bit may also used in conjunction with system calibration
(see Calibration Section on page 21).
Calibration Mode Bit. A 0 here selects self-calibration and a 1 selects a system calibration (see Table III).
Calibration Selection Bits and Start Calibration Bit. These bits have two functions.
With the STCAL bit set to 1, the CALSLT1 and CALSLT0 bits determine the type of calibration per-
formed by the part (see Table III). The STCAL bit is automatically reset to 0 at the end of calibration.
With the STCAL bit set to 0, the CALSLT1 and CALSLT0 bits are decoded to address the calibration
register for read/write of calibration coefficients (see section on the calibration registers for more details).
4
CONVST
3
2
1
0
CALMD
CALSLT1
CALSLT0
STCAL
Table III. Calibration Selection
CALMD
CALSLT1
CALSLT0
Calibration Type
0
0
0
A
full internal calibration
is initiated where the internal DAC is calibrated followed by the
internal gain error and finally the internal offset error is calibrated out. This is the default setting.
Here the
internal gain error
is calibrated out followed by the
internal offset error
calibrated
out.
This calibrates out the
internal offset error
only.
This calibrates out the
internal gain error
only.
A
full system calibration
is initiated here where first the internal DAC is calibrated, fol-
lowed by the system gain error, and finally the system offset error is calibrated out.
Here the
system gain error
is calibrated out followed by the
system offset error
.
This calibrates out the
system offset error
only.
This calibrates out the
system gain error
only.
0
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
1
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PDF描述 |
|---|---|
| EVAL-AD7854CB | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| EVAL-AD7856CB | 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| EVAL-AD7858CB | 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7854CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7856CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| EVAL-AD7858CB | 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Bulk |
| EVAL-AD7858CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADC |
| EVAL-AD7859CB | 制造商:Analog Devices 功能描述:Evaluation Board For 3V To 5V, 12-Bit 200KSPS, Multi-Channel, Sampling ADC |
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