參數(shù)資料
型號(hào): EVAL-AD7730EB
廠商: Analog Devices, Inc.
英文描述: Bridge Transducer ADC
中文描述: 橋傳感器模數(shù)轉(zhuǎn)換器
文件頁數(shù): 1/52頁
文件大?。?/td> 497K
代理商: EVAL-AD7730EB
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD7730/AD7730L
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
Bridge Transducer ADC
FUNCT IONAL BLOCK DIAGRAM
KEY FEATURES
Resolution of 230,000 Counts (Peak-to-Peak)
Offset Drift: 5 nV/
8
C
Gain Drift: 2 ppm/
8
C
Line Frequency Rejection: >150 dB
Buffered Differential Inputs
Programmable Filter Cutoffs
Specified for Drift Over Time
Operates with Reference Voltages of 1 V to 5 V
ADDITIONAL FEATURES
Two-Channel Programmable Gain Front End
On-Chip DAC for Offset/TARE Removal
FASTStep Mode
AC or DC Excitation
Single Supply Operation
APPLICATIONS
Weigh Scales
Pressure Measurement
GE NE RAL DE SCRIPT ION
T he AD7730 is a complete analog front end for weigh-scale and
pressure measurement applications. T he device accepts low-
level signals directly from a transducer and outputs a serial
digital word. T he input signal is applied to a proprietary pro-
grammable gain front end based around an analog modulator.
FAST
Step is a trademark of Analog Devices, Inc.
SIGMA-
DELTA
MODULATOR
AD7730
6-BIT
DAC
SERIAL INTERFACE
AND CONTROL LOGIC
REGISTER BANK
CLOCK
GENERATION
PROGRAMMABLE
DIGITAL
FILTER
SIGMA-DELTA A/D CONVERTER
BUFFER
PGA
100nA
AGND
100nA
AV
DD
VBIAS
AIN1(+)
AIN1(–)
AIN2(+)/D1
AIN2(–)/D0
ACX
ACX
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
RESET
RDY
POL
DGND
AGND
AV
DD
DV
DD
REF IN(–)
REF IN(+)
MUX
REFERENCE DETECT
AC
EXCITATION
CLOCK
CALIBRATION
MICROCONTROLLER
+
+/–
T he modulator output is processed by a low pass programmable
digital filter, allowing adjustment of filter cutoff, output rate and
settling time.
T he part features two buffered differential programmable gain
analog inputs as well as a differential reference input. T he part
operates from a single +5 V supply. It accepts four unipolar
analog input ranges: 0 mV to +10 mV, +20 mV, +40 mV and
+80 mV and four bipolar ranges:
±
10 mV,
±
20 mV,
±
40 mV
and
±
80 mV. T he peak-to-peak resolution achievable directly
from the part is 1 in 230,000 counts. An on-chip 6-bit DAC
allows the removal of T ARE voltages. Clock signals for synchro-
nizing ac excitation of the bridge are also provided.
T he serial interface on the part can be configured for three-wire
operation and is compatible with microcontrollers and digital
signal processors. T he AD7730 contains self-calibration and
system calibration options, and features an offset drift of less
than 5 nV/
°
C and a gain drift of less than 2 ppm/
°
C.
T he AD7730 is available in a 24-pin plastic DIP, a 24-lead
SOIC and 24-lead T SSOP package. T he AD7730L is available
in a 24-lead SOIC and 24-lead T SSOP package.
NOT E
T he description of the functions and operation given in this data
sheet apply to both the AD7730 and AD7730L. Specifications
and performance parameters differ for the parts. Specifications
for the AD7730L are outlined in Appendix A.
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