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參數(shù)資料
| 型號： | EVAL-AD7366SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7366 |
| 標準包裝： | 1 |
| 系列： | iCMOS® |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±10 V |
| 在以下條件下的電源（標準）： | 70mW @ 1MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7366 |
| 已供物品： | 板 |
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AD7366/AD7367
Rev. D | Page 21 of 28
SHUTDOWN MODE
Shutdown mode is intended for use in applications where slow
throughput rates are required. Shutdown mode is suited to
applications where a series of conversions performed at a
relatively high throughput rate are followed by a long period
of inactivity and thus, shutdown. When the AD7366/AD7367
are in full power-down, all analog circuitry is powered down.
The falling edge of CNVST initiates the conversion. The BUSY
output subsequently goes high to indicate that the conversion is
in progress. After the conversion is completed, the BUSY output
returns low. If the CNVST signal is at logic low when BUSY
goes low, the part enters shutdown at the end of the conversion
phase. While the part is in shutdown mode, the digital output
code from the last conversion on each ADC can still be read
from the DOUT pins. To read the DOUT data, CS must be brought
return to three-state when CS is brought back to logic high.
To exit full power-down and to power up the AD7366/AD7367,
a rising edge of CNVST is required. After the required power-up
time has elapsed, CNVST can be brought low again to initiate
another conversion, as shown in Figure 24 (see the Power-Up
Times section for power-up times associated with the AD7366/
AD7367).
POWER-UP TIMES
The AD7366/AD7367 have one power-down mode, which is
described in detail in the Shutdown Mode section. This section
deals with the power-up time required when coming out of
shutdown mode. It should be noted that the power-up times (as
explained in this section) apply with the recommended capaci-
tors in place on the DCAPA and DCAPB pins. To power up from
shutdown, CNVST must be brought high and remain high for a
minimum of 70 μs, as shown in Figure 24.
When power supplies are first applied to the AD7366/AD7367,
the ADC can power up with CNVST in either the low or high
logic state. Before attempting a valid conversion, CNVST must
be brought high and remain high for the recommended power-
up time of 70 μs. Then CNVST can be brought low to initiate a
conversion. With the AD7366/AD7367, no dummy conversion
is required before valid data can be read from the
DOUT pins.
To place the part in shutdown mode when the supplies are first
applied, the AD7366/AD7367 must be powered up and a
conversion initiated. However, CNVST should remain in the
logic low state so that when the BUSY signal goes low, the part
enters shutdown.
When supplies are applied to the AD7366/AD7367, sufficient
time must be allowed for any external reference to power up and
to charge the various reference buffer decoupling capacitors to
their final values.
BUSY
SCLK
SERIAL READ OPERATION
CS
1
12
tCONVERT
t3
t2
ENTERS SHUTDOWN
tPOWER-UP
06703-
026
CNVST
Figure 24. Autoshutdown Mode for the AD7366
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7367CBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:True Bipolar Input, Dual 1 レs, 12-/14-Bit, 2-Channel SAR ADCs |
| EVAL-AD7367SDZ | 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 EVALUATION CONTROL BOARD I.C. RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| EVAL-AD7376EBZ | 功能描述:BOARD EVAL FOR AD7376 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| EVAL-AD7400AEBZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-AD7400AEDZ | 功能描述:BOARD EVAL AD7400A RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉換器 (ADC) 系列:iCoupler® 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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