參數(shù)資料
型號(hào)： EM773FHN33,551
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 7/51頁(yè)
文件大?。?/td> 0K
描述： IC ENERGY METER ARM 32VQFN
其它有關(guān)文件： EM773 Energy Metering IC Training
特色產(chǎn)品： EM773 Energy Metering IC
標(biāo)準(zhǔn)包裝： 260
核心處理器： ARM? Cortex?-M0
芯體尺寸： 32-位
速度： 48MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 25
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 32-VQFN 裸露焊盤
包裝： 托盤
配用： 568-6681-ND - BOARD EVAL EM773 METER EU PLUG
568-6680-ND - BOARD EVAL EM773 METER US PLUG
其它名稱： 568-5213
EM773
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 3 January 2012
15 of 51
NXP Semiconductors
EM773
Energy metering IC
7.15 Clocking and power control
7.15.1 Crystal oscillators
The EM773 includes three independent oscillators. These are the system oscillator, the
Internal RC oscillator (IRC), and the Watchdog oscillator. Each oscillator can be used for
more than one purpose as required in a particular application.
Following reset, the EM773 will operate from the Internal RC oscillator until switched by
software. This allows systems to operate without any external crystal and the bootloader
code to operate at a known frequency.
See Figure 4 for an overview of the EM773 clock generation.
7.15.1.1
Internal RC oscillator
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the
PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC is
trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the EM773 uses the IRC as the clock source. Software
may later switch to one of the other available clock sources.
Fig 4.
EM773 clock generation block diagram
SYSTEM PLL
IRC oscillator
system oscillator
watchdog oscillator
IRC oscillator
watchdog oscillator
MAINCLKSEL
(main clock select)
SYSPLLCLKSEL
(system PLL clock select)
SYSTEM CLOCK
DIVIDER
AHB clock 0
(system)
SYSAHBCLKCTRL[1:18]
(AHB clock enable)
AHB clocks 1 to 18
(memories
and peripherals)
SPI0 PERIPHERAL
CLOCK DIVIDER
SPI0
UART PERIPHERAL
CLOCK DIVIDER
UART
WDT CLOCK
DIVIDER
WDT
WDTUEN
(WDT clock update enable)
watchdog oscillator
IRC oscillator
system oscillator
CLKOUT PIN CLOCK
DIVIDER
CLKOUT pin
CLKOUTUEN
(CLKOUT update enable)
002aag729
main clock
system clock
IRC oscillator
18
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