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參數(shù)資料
| 型號(hào)： | EM773FHN33,551 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 22/51頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ENERGY METER ARM 32VQFN |
| 其它有關(guān)文件： | EM773 Energy Metering IC Training |
| 特色產(chǎn)品： | EM773 Energy Metering IC |
| 標(biāo)準(zhǔn)包裝： | 260 |
| 核心處理器： | ARM? Cortex?-M0 |
| 芯體尺寸： | 32-位 |
| 速度： | 48MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 25 |
| 程序存儲(chǔ)器容量： | 32KB（32K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 3.6 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 32-VQFN 裸露焊盤 |
| 包裝： | 托盤 |
| 配用： | 568-6681-ND - BOARD EVAL EM773 METER EU PLUG 568-6680-ND - BOARD EVAL EM773 METER US PLUG |
| 其它名稱： | 568-5213 |
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EM773
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 3 January 2012
29 of 51
NXP Semiconductors
EM773
Energy metering IC
9.3 Peripheral power consumption
The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code is executed. Measured on a typical sample at Tamb =25 C. Unless
noted otherwise, the system oscillator and PLL are running in both measurements.
The supply currents are shown for system clock frequencies of 12 MHz and 48 MHz.
Table 6.
Power consumption for individual analog and digital blocks
Peripheral
Typical supply current in
mA
Notes
n/a
12 MHz
48 MHz
IRC
0.27
-
System oscillator running; PLL off; independent
of main clock frequency.
System oscillator
at 12 MHz
0.22
-
IRC running; PLL off; independent of main clock
frequency.
Watchdog
oscillator at
500 kHz/2
0.004
-
System oscillator running; PLL off; independent
of main clock frequency.
BOD
0.051
-
Independent of main clock frequency.
Main PLL
-
0.21
-
CLKOUT
-
0.12
0.47
Main clock divided by 4 in the CLKOUTDIV
register.
CT16B0
-
0.02
0.06
CT16B1
-
0.02
0.06
CT32B0
-
0.02
0.07
CT32B1
-
0.02
0.06
GPIO
-
0.23
0.88
GPIO pins configured as outputs and set to
LOW. Direction and pin state are maintained if
the GPIO is disabled in the SYSAHBCLKCFG
register.
IOCONFIG
-
0.03
0.10
I2C
-
0.04
0.13
ROM
-
0.04
0.15
SPI0
-
0.12
0.45
UART
-
0.22
0.82
WDT
-
0.02
0.06
Main clock selected as clock source for the
WDT.
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