參數(shù)資料
型號： EM773FHN33,551
廠商： NXP Semiconductors
文件頁數(shù)： 11/51頁
文件大?。?/td> 0K
描述： IC ENERGY METER ARM 32VQFN
其它有關(guān)文件： EM773 Energy Metering IC Training
特色產(chǎn)品： EM773 Energy Metering IC
標(biāo)準(zhǔn)包裝： 260
核心處理器： ARM? Cortex?-M0
芯體尺寸： 32-位
速度： 48MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，WDT
輸入/輸出數(shù)： 25
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 32-VQFN 裸露焊盤
包裝： 托盤
配用： 568-6681-ND - BOARD EVAL EM773 METER EU PLUG
568-6680-ND - BOARD EVAL EM773 METER US PLUG
其它名稱： 568-5213
EM773
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 3 January 2012
19 of 51
NXP Semiconductors
EM773
Energy metering IC
2. CRP2 disables access to the chip via the SWD and only allows full flash erase and
update using a reduced set of the ISP commands.
3. Running an application with level CRP3 selected fully disables any access to the chip
via the SWD pins and the ISP. This mode effectively disables ISP override using
PIO0_1 pin, too. It is up to the user’s application to provide (if needed) flash update
mechanism using IAP calls or call reinvoke ISP command to enable flash update via
the UART.
In addition to the three CRP levels, sampling of pin PIO0_1 for valid user code can be
disabled. For details see the EM773 user manual.
7.16.5 APB interface
The APB peripherals are located on one APB bus.
7.16.6 AHBLite
The AHBLite connects the CPU bus of the ARM Cortex-M0 to the flash memory, the main
static RAM, and the Boot ROM.
7.16.7 External interrupt inputs
All GPIO pins can be level or edge sensitive interrupt inputs. In addition, start logic inputs
serve as external interrupts (see Section 7.16.1).
7.17 Emulation and debugging
Debug functions are integrated into the ARM Cortex-M0. Serial wire debug with four
breakpoints and two watchpoints is supported.
CAUTION
If level three Code Read Protection (CRP3) is selected, no future factory testing can be
performed on the device.
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