- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362657 > ELANSC300-33KC (ADVANCED MICRO DEVICES INC) Highly Integrated, Low-Power, 32-Bit Microcontroller PDF資料下載
參數(shù)資料
| 型號： | ELANSC300-33KC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, 33 MHz, MICROCONTROLLER, PQFP208 |
| 封裝： | SHRINK, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 55/139頁 |
| 文件大小： | 1388K |
| 代理商： | ELANSC300-33KC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁當(dāng)前第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁
élanSC300 Microcontroller Data Sheet
55
P R E L I M I N A R Y
PMC and PGP Pins
The élanSC300 microcontroller supports five power
management control (PMC) pins and four programma-
ble general purpose (PGP) pins. The PMC pins can be
used to control the VCC rails of peripheral devices. The
PMC pins are related to the operating modes of the
élanSC300 microcontroller PMU. The PGP pins can be
used as general I/O chip selects for various uses.
The PMC4–PMC0 pins are controlled by Configuration
Registers at Indexes 80h, 81h, ABh, and ACh. Each
pin can be programmed to be activated upon entry into
any of the PMU modes or driven directly by software.
PMC0 can be activated when the system is in High-
Speed PLL or Low-Speed PLL modes; PMC1 when the
system is in Doze mode; PMC2 when the system is in
Sleep mode; PMC3 and PMC4 when the system is in
Suspend mode; or just about any other combination.
These pins can then be used by the system designer to
shut off power to particular peripherals when the sys-
tem enters certain modes, just as internal clocks are
slowed or stopped in these modes. Upon the rising
edge of RESIN, PMC0, PMC1, PMC2, and PMC4 are
asserted Low and PMC3 is asserted High. Prior to this
edge, these signals are undefined.
The élanSC300 microcontroller can be programmed to
reset a timer when an I/O access to a preset address
range is detected. If no I/O activity in that range occurs
before the timer expires, the élanSC300 microcontrol-
ler can assert a PMC signal to turn off the device. When
S/W accesses that address range later, the élanSC300
microprocessor can generate a System Management
Interrupt (SMI) to the processor, which then activates
an SMI handler routine. This routine then can deter-
mine the cause of the SMI and take appropriate action,
such as powering the I/O device back on.
The PGP3–PGP0 pins are controlled by several config-
uration registers (70h, 74h, 89h, 91h, 94h, 95h, 9Ch,
A3h, and A4h) and their behavior is very flexible. PGP0
and PGP1 can be programmed as input or output.
PGP2 and PGP3 are dedicated outputs. PGP1 and
PGP3 can be gated with I/O reads, PGP0 and PGP2
can be gated with I/O writes, or each can act as an ad-
dress decode for a chip select.
Micro Power Off Mode
Micro Power Off mode is the power management mode
that is used for battery backup.
Micro Power Off mode allows the system designer to
remove power from the VCC1, VSYS, VSYS2, VCC5,
and optionally, VMEM power inputs to the microcontrol-
ler. This allows the RTC timer and RAM contents to be
kept valid by using a battery back-up power source on
the VCC core and AVCC pins, which typically should
use only 25
μ
A in this mode.
The following paragraphs describe the élanSC300 mi-
crocontroller in Micro Power Off mode. The following
are distinctive characteristics:
n
Minimum Power Consumption mode (approxi-
mately 25
μ
A typical, AVCC, and Core VCC com-
bined; AVCC and VCC are mandatory for Micro
Power Off mode).
n
Allows the system designer to utilize the internal
RTC and RTC RAM to maintain time, date, and
system configuration data while the other system
peripherals are powered off.
n
Provides the system designer with the option of
keeping the system DRAM powered and refreshed
while other system peripherals are powered off.
Self-refresh and CAS-before-RAS refresh DRAMs
are supported.
n
Minimal external logic required to properly control
power supplies and/or power switching.
n
No external buffering required to properly power
down system hardware.
The élanSC300 microcontroller allows a system de-
signer to easily maintain the internal RTC and RTC
RAM and optionally, the DRAM interface, while the rest
of the system peripherals attached directly to the de-
vice are powered off. All élanSC300 microcontroller
power pins associated with the I/O pins of external
powered-off peripherals must be powered down also.
This, in addition to internal termination, provides the re-
quired isolation to allow the external peripherals to be
powered off.
Automatically controlled internal I/O termination is pro-
vided to terminate the internal nodes of the élanSC300
microcontroller properly when required.
The DRAM CAS-before-RAS, or self-refresh, can be
maintained by the élanSC300 microcontroller in this
Micro Power State, if configured to do so, utilizing the
32-kHz oscillator. This clock continues to drive the RTC
and a portion of the core logic. See the élan
TM
SC300
and élan
TM
SC310 Microcontrollers Solution For Sys-
tems Using a Back-up Battery Application Note
, order
#20746 for more information about the 32-kHz oscilla-
tor and the RTC. The VMEM power plane (DRAM/
SRAM section power) must remain powered on if the
CAS-before-RAS refresh option is selected while in the
Micro Power state. The VMEM power plane must also
remain powered on if the self-refresh option is selected
and the specific DRAM device requires any of its con-
trol pins (i.e., WE, CAS, RAS, etc.) to remain inactive in
the Self-Refresh mode. If this is not required, it may be
possible for the system designer to remove power from
the VMEM pins when entering the Micro Power state,
even when the Self-Refresh mode DRAMs remain
powered on.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ELANSC300-33KI | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33VC | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300 | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-25KC | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-25KI | Highly Integrated, Low-Power, 32-Bit Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ELANSC300-33KI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: 制造商:AMD 功能描述: |
| ELANSC300-33VI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300WW WAF | 制造商:Advanced Micro Devices 功能描述: |
| ELANSC310 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Elan SC310 - Elan SC310 Single-Chip. 32-Bit. PC/AT Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。