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參數(shù)資料
| 型號(hào)： | EB402 |
| 英文描述： | EB402 Evaluation Board user＇s guide 7/01 |
| 中文描述： | EB402評(píng)估板用戶(hù)指南7月1日 |
| 文件頁(yè)數(shù)： | 46/84頁(yè) |
| 文件大小： | 1014K |
| 代理商： | EB402 |
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4-2
Operation
LED3 is connected to PIO0 and illuminates whenever PIO0 is LOW. The
evaluation board illuminates LED3 when the self-test diagnostic starts,
and extinguishes LED3 when the diagnostic completes successfully
(approximately 5 seconds). If the self-test fails, LED3 remains
illuminated. However, PIO0 is also connected to SPORT0, and a
low impedance load connected to PIO0 on the SPORT0 daughterboard
can also cause LED3 to illuminate.
Refer to LSI402ZX Digital Signal Processor User’s Guide for more
information about self-test.
4.2 JTAG Emulation
The LSI402ZX JTAG port IEEE 1149.1-compliant test access port (TAP)
that provides access to all on-chip resources. The DEU works with code
residing in the boot ROM to provide full-speed in-circuit emulation and to
allow full visibility and control of the device’s memory and registers. Refer
to LSI402ZX Digital Signal Processor User’s Guide for additional
information about the JTAG port and the DEU.
4.2.1 JTAG Software Tools
To use the EB402 in the JTAG mode, you need software tools that are
compatible with your JTAG controller hardware.
4.2.1.1 ZSP SDK Software Development KIt
Using the Corelis JTAG controller with the EB402 requires the ZSP SDK
Software Development Kit. This kit includes a C-language cross compiler,
assembler and linker, simulator, debugger, and software drivers for the
Corelis JTAG controllers. The user interface is the same for emulation
and simulation.
The SDK software tools are compatible with DOS, Windows 95,
Windows 98, Windows 2000, Windows NT, and Solaris operating
systems. Check the ZSP web site (http://www.zsp.com) for the latest
information about compatible computers, operating systems, JTAG
controllers, and development software.
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