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參數(shù)資料
| 型號(hào)： | EB402 |
| 英文描述： | EB402 Evaluation Board user＇s guide 7/01 |
| 中文描述： | EB402評(píng)估板用戶指南7月1日 |
| 文件頁數(shù)： | 31/84頁 |
| 文件大?。?/td> | 1014K |
| 代理商： | EB402 |
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External Interfaces
3-15
Figure 3.6 shows the pin numbers and signal names for J3, which is the
20-pin serial port connector on the codec daughterboard.
Figure 3.6
J3, BD-EBM-CODEC-1 Serial Port Connector
The codec receives audio frequency signals from an external system
through two audio jacks. The codec digitizes the signals and transmits
them to the LSI402ZX for processing. The module also receives processed
digital signals from the LSI402ZX, converts them to analog signals, and
transmits them to an external system through two other audio jacks.
Analog input signals from the audio jacks are sent to the 16-bit
analog-to-digital converters (ADCs) in the AD73322s, which are general
purpose dual-analog front-end devices. There are two of these devices
on each daughterboard, and each device has two ADCs. After the analog
signals are digitized, they are transmitted to the EB402 through the
AD73322’s serial ports.
The codec module receives processed digital signals from the EB402
through the AD73322 serial ports. The AD73322s perform a
digital-to-analog conversion (DAC) on the signals and transmit them to
an external system through two audio output jacks.
The codec analog outputs are limited to driving high-impedance loads.
They should only be used to drive amplied speakers that accept
line-level inputs. Do not connect passive, low-impedance (8
) speakers
to these outputs. The analog inputs must also be line-level signals.
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
DVDD
SOD1
SORFS
SYSRESETN
SDRCLK
DGND
SOXFS
DGND
SDXCLK
DGND
DVDD
INT2
PIO0
PIO1
10 MHz*
+9 VDC*
SOD0
SDIBF
SDOBE
DGND
Note: * Revision 2 PCBs only; no connection on Revision 1 PCBs.
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