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| 型號(hào)： | EA-QSB-012 |
| 廠商： | Embedded Artists |
| 文件頁數(shù)： | 13/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD QUICK START LPC1343 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | LPC13xx |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | LPC1343 |
| 所含物品： | 板 |
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LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
20 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
On the LPC1311/13/42/43, all GPIO pins (except PIO0_4 and PIO0_5) are pulled up
to 2.6 V (VDD = 3.3 V) if their pull-up resistor is enabled in the IOCONFIG block.
On the LPC1311/01 and LPC1313/01, all GPIO pins (except PIO0_4 and PIO0_5) are
pulled up to 3.3 V (VDD = 3.3 V) if their pull-up resistor is enabled in the IOCONFIG
block.
7.9 USB interface (LPC1342/43 only)
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports
hot-plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The LPC1342/43 USB interface is a device controller with on-chip PHY for device
functions.
7.9.1 Full-speed USB device controller
The device controller enables 12 Mbit/s data exchange with a USB Host controller. It
consists of a register interface, serial interface engine, and endpoint buffer memory. The
serial interface engine decodes the USB data stream and writes data to the appropriate
endpoint buffer. The status of a completed USB transfer or error condition is indicated via
status registers. An interrupt is also generated if enabled.
7.9.1.1
Features
Dedicated USB PLL available.
Fully compliant with USB 2.0 specification (full speed).
Supports 10 physical (5 logical) endpoints with up to 64 bytes buffer RAM per
endpoint (see Table 5).
Supports Control, Bulk, Isochronous, and Interrupt endpoints.
Supports SoftConnect feature.
Double buffer implementation for Bulk and Isochronous endpoints.
Table 5.
USB device endpoint configuration
Logical
endpoint
Physical
endpoint
Endpoint type
Direction
Packet size
(byte)
Double buffer
0
Control
out
64
no
0
1
Control
in
64
no
1
2
Interrupt/Bulk
out
64
no
1
3
Interrupt/Bulk
in
64
no
2
4
Interrupt/Bulk
out
64
no
2
5
Interrupt/Bulk
in
64
no
3
6
Interrupt/Bulk
out
64
yes
3
7
Interrupt/Bulk
in
64
yes
4
8
Isochronous
out
512
yes
4
9
Isochronous
in
512
yes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EA-QSB-015 | 功能描述:開發(fā)板和工具包 - ARM QUICK START BOARD LPC11U35 RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| EA-QSB-016 | 制造商:Embedded Artists 功能描述:BOARD QUICK START LPC4088 |
| EA-QSB-017 | 制造商:Embedded Artists 功能描述:BOARD QSB BASE LPC4088 |
| EA-QSB-100 | 功能描述:開發(fā)板和工具包 - ARM QUICKSTART PROTOTYPE BRD RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| EA-QSB-102 | 功能描述:開發(fā)板和工具包 - ARM QUICKSTART PROTOTYPE BRD W/ LPC2106 RS232 RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
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