參數(shù)資料
型號： E28F200B5B60
廠商： INTEL CORP
元件分類： PROM
英文描述： DIRECTIONAL COUPLER, 20DB, SMT
中文描述： 256K X 8 FLASH 5V PROM, 70 ns, PDSO48
封裝： 12 X 20 MM, TSOP-48
文件頁數(shù)： 43/44頁
文件大?。?/td> 345K
代理商： E28F200B5B60
28F200B5, 28F004/400B5, 28F800B5
E
8
PRELIMINARY
Table 2. Pin Descriptions (Continued)
Symbol
Type
Name and Function
WP#
INPUT
WRITE PROTECT: Provides a method for unlocking the boot block with a logic
level signal in a system without a 12 V supply.
When WP# is at logic low, the boot block is locked, preventing program and
erase operations to the boot block. If a program or erase operation is attempted
on the boot block when WP# is low, the corresponding status bit (bit 4 for
program, bit 5 for erase) will be set in the status register to indicate the operation
failed.
When WP# is at logic high, the boot block is unlocked and can be
programmed or erased.
NOTE: This feature is overridden and the boot block unlocked when RP# is at
VHH. This pin can not be left floating. Because the 8-Mbit 44-PSOP package does
not have enough pins, it does not include this pin and thus 12 V on RP# is
required to unlock the boot block. See Section 3.3 for details on write protection.
BYTE#
INPUT
BYTE# ENABLE: Configures whether the device operates in byte-wide mode (x8)
or word-wide mode (x16). This pin must be set at power-up or return from deep
power-down and not changed during device operation. BYTE# pin must be
controlled at CMOS levels to meet the CMOS current specification in standby
mode.
When BYTE# is at logic low, the byte-wide mode is enabled, where data is
read and programmed on DQ0–DQ7 and DQ15/A–1 becomes the lowest order
address that decodes between the upper and lower byte. DQ8–DQ14 are tri-stated
during the byte-wide mode.
When BYTE# is at logic high, the word-wide mode is enabled, where data is
read and programmed on DQ0–DQ15.
Not applicable to 28F004B5.
VCC
DEVICE POWER SUPPLY: 5.0 V
± 10%
VPP
PROGRAM/ERASE POWER SUPPLY: For erasing memory array blocks or
programming data in each block, a voltage either of 5 V
± 10% or 12 V ± 5% must
be applied to this pin. When VPP < VPPLK all blocks are locked and protected
against Program and Erase commands.
GND
GROUND: For all internal circuitry.
NC
NO CONNECT: Pin may be driven or left floating.
2.2
Pinouts
Intel 5 Volt Boot Block Flash architecture provides
upgrade paths in each package pinout up to the
8-Mbit density. The 44-lead PSOP pinout follows
the industry-standard ROM/EPROM pinout, as
shown in Figure 1. Designs with space concerns
should consider the 48-lead pinout shown in
Figure 2. Applications using an 8-bit bus can use
the 40-lead TSOP, which is available for the 4-Mbit
device only.
Pinouts for the corresponding 2-, 4-, and 8-Mbit
components are provided on the same diagram for
convenient reference. 2-Mbit pinouts are given on
the chip illustration in the center, with 4-Mbit and
8-Mbit pinouts going outward from the center.
相關(guān)PDF資料
PDF描述
E28F200BX-B120 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
E28F200BX-B60 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
E28F200BX-B80 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
E28F200BX-T120 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
E28F002BX-T120 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
E28F200B5B80 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
E28F200B5T60 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
E28F200B5T80 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述:
E28F200BL-B150 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT (128K x 16, 256K x 8)LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
E28F200BL-T150 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT (128K x 16, 256K x 8)LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
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