- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1917 > DSPIC30F6010-20E/PF (Microchip Technology)IC DSPIC MCU/DSP 144K 80TQFP PDF資料下載
參數(shù)資料
| 型號： | DSPIC30F6010-20E/PF |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 101/110頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSPIC MCU/DSP 144K 80TQFP |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 90 |
| 系列： | dsPIC™ 30F |
| 核心處理器： | dsPIC |
| 芯體尺寸： | 16-位 |
| 速度： | 20 MIPS |
| 連通性： | CAN，I²C，SPI，UART/USART |
| 外圍設備： | 高級欠壓探測/復位，LVD，電機控制 PWM，QEI，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 68 |
| 程序存儲器容量： | 144KB（48K x 24） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.5 V ~ 5.5 V |
| 數(shù)據(jù)轉換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 80-TQFP |
| 包裝： | 托盤 |
| 配用： | DM300019-ND - BOARD DEMO DSPICDEM 80L STARTER AC164314-ND - MODULE SKT FOR PM3 80PF DM300020-ND - BOARD DEV DSPICDEM MC1 MOTORCTRL |
| 其它名稱： | DSPIC30F601020EPF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁當前第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
dsPIC30F6010
DS70119E-page 88
2006 Microchip Technology Inc.
15.1.4
DOUBLE UPDATE MODE
In the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR regis-
ter is equal to zero, as well as each time a period match
occurs. The postscaler selection bits have no effect in
this mode of the timer.
The Double Update mode provides two additional func-
tions to the user. First, the control loop bandwidth is
doubled because the PWM duty cycles can be
updated, twice per period. Second, asymmetrical cen-
ter-aligned PWM waveforms can be generated, which
are useful for minimizing output waveform distortion in
certain motor control applications.
15.1.5
PWM TIME BASE PRESCALER
The input clock to PTMR (FOSC/4), has prescaler
options of 1:1, 1:4, 1:16, or 1:64, selected by control
bits PTCKPS<1:0> in the PTCON SFR. The prescaler
counter is cleared when any of the following occurs:
a write to the PTMR register
a write to the PTCON register
any device Reset
The PTMR register is not cleared when PTCON is
written.
15.1.6
PWM TIME BASE POSTSCALER
The match output of PTMR can optionally be post-
scaled through a 4-bit postscaler (which gives a 1:1 to
1:16 scaling).
The postscaler counter is cleared when any of the
following occurs:
a write to the PTMR register
a write to the PTCON register
any device Reset
The PTMR register is not cleared when PTCON is written.
15.2
PWM Period
PTPER is a 15-bit register and is used to set the count-
ing period for the PWM time base. PTPER is a double-
buffered register. The PTPER buffer contents are
loaded into the PTPER register at the following instants:
Free Running and Single Shot modes: When the
PTMR register is reset to zero after a match with
the PTPER register.
Up/Down Counting modes: When the PTMR
register is zero.
The value held in the PTPER buffer is automatically
loaded into the PTPER register when the PWM time
base is disabled (PTEN = 0).
The
PWM
period
can
be
determined
using
EQUATION 15-1:
PWM PERIOD
If the PWM time base is configured for one of the Up/
Down Count modes, the PWM period will be twice the
value provided by Equation 15-2.
EQUATION 15-2:
PWM PERIOD (UP/DOWN
MODE)
The maximum resolution (in bits) for a given device
oscillator and PWM frequency can be determined using
EQUATION 15-3:
PWM RESOLUTION
15.3
Edge-Aligned PWM
Edge-aligned PWM signals are produced by the module
when the PWM time base is in the Free Running or Sin-
gle Shot mode. For edge-aligned PWM outputs, the out-
put has a period specified by the value in PTPER and a
duty cycle specified by the appropriate duty cycle regis-
ter (see Figure 15-2). The PWM output is driven active
at the beginning of the period (PTMR = 0) and is driven
inactive when the value in the duty cycle register
matches PTMR.
If the value in a particular duty cycle register is zero,
then the output on the corresponding PWM pin will be
inactive for the entire PWM period. In addition, the out-
put on the PWM pin will be active for the entire PWM
period if the value in the duty cycle register is greater
than the value held in the PTPER register.
Note:
Programming a value of 0x0001 in the
period register could generate a continu-
ous interrupt pulse, and hence, must be
avoided.
TPWM =
Tcy (PTPER + 1)
(PTMR Prescale Value)
TPWM =
2 Tcy (PTPER + 0.75)
(PTMR Prescale Value)
Resolution
=
log (2 Tpwm / Tcy)
log (2)
相關PDF資料 |
PDF描述 |
|---|---|
| DSPIC30F6010A-30I/PF | IC DSPIC MCU/DSP 144K 80TQFP |
| DSPIC30F6013A-30I/PF | IC DSPIC MCU/DSP 132K 80TQFP |
| DSPIC30F6014-30I/PF | IC DSPIC MCU/DSP 144K 80TQFP |
| DSPIC33EP512MU814-I/PL | IC DSC 16BIT 512KB 144LQFP |
| DSPIC33EP64MC504-E/TL | IC DSC 16BIT 64KB FLASH 44-VTLA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DSPIC30F6010-20I/PF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 20MHz 144KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| DSPIC30F6010-20I/PF | 制造商:Microchip Technology Inc 功能描述:16BIT 20MIPS DSPIC SMD 30F6010 |
| DSPIC30F6010-30I/PF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 30MHz 144KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| DSPIC30F6010-30I/PF | 制造商:Microchip Technology Inc 功能描述:16BIT 30MIPS DSPIC SMD 30F6010 |
| DSPIC30F6010-30I/PF | 制造商:Microchip Technology Inc 功能描述:Digital Signal Processor IC Frequency Ma |
發(fā)布緊急采購，3分鐘左右您將得到回復。