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參數(shù)資料
| 型號： | DSPE56007FJ88 |
| 英文描述： | DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC |
| 中文描述： | 數(shù)字信號處理器| 24位|的CMOS | QFP封裝| 80腳|塑料 |
| 文件頁數(shù)： | 59/83頁 |
| 文件大小： | 382K |
| 代理商： | DSPE56007FJ88 |
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Specifications
Serial Host Interface (SHI) I
2
C Protocol Timing
MOTOROLA
DSP56007/D
2-35
Note:
1.
2.
C
L
is in pF, R
P
is in k
, and result is in ns.
A t
I
Bypassed Filter mode.
A t
I
Narrow Filter mode.
A t
I
Filter mode.
A t
I
Bypassed Filter mode.
A t
I
Narrow Filter mode.
A t
I
Filter mode.
A t
I
Bypassed Filter mode.
A t
I
Narrow Filter mode.
A t
I
Filter mode.
Refer to the
DSP56007 User’s Manual
for a detailed description of how to use the different filtering
modes.
2
CCP
of 34
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 36
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 40
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the Wide
3.
2
CCP
of 43
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 46
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 51
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the Wide
4.
2
CCP
of 56
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 60
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the
2
CCP
of 66
×
T
C
(the maximum permitted for the given bus load) was used for the calculations in the Wide
5.
Figure 2-21
I
2
C Timing
Table 2-15
SHI Improved I
2
C Protocol Timing (Continued)
Improved I
2
C (C
L
= 50 pF, R
P
= 2 k
)
No.
Char.
Sym.
Mode
Filter
Mode
Expression
50 MHz
2
66 MHz
3
88 MHz
4
U
n
i
t
Min Max Min Max Min Max
Start
SCL
HREQ
SDA
ACK
MSB
LSB
Stop
171
Stop
173
176
175
177
178
180
179
172
186
182
183
189
174
188
184
187
AA0275
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