- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377002 > DSPE56007FJ88 DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC PDF資料下載
參數(shù)資料
| 型號(hào)： | DSPE56007FJ88 |
| 英文描述： | DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC |
| 中文描述： | 數(shù)字信號(hào)處理器| 24位|的CMOS | QFP封裝| 80腳|塑料 |
| 文件頁(yè)數(shù)： | 12/83頁(yè) |
| 文件大?。?/td> | 382K |
| 代理商： | DSPE56007FJ88 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)
1-6
DSP56007/D
MOTOROLA
Signal/Connection Descriptions
External Memory Interface (EMI)
.
MD0–MD7
Bidi-
rectional
Tri-stated
Data Bus
—These signals provide the bidirectional data bus for
EMI accesses. They are inputs during reads from external
memory, outputs during writes to external memory, and tri-
stated if no external access is taking place. If the data bus width
is defined as four bits wide, only signals MD0–MD3 are active,
while signals MD4–MD7 remain tri-stated. While tri-stated,
MD0–MD7 are disconnected from the pins and do not require
external pull-ups.
Table 1-6
EMI States during Reset and Stop States
Signal
Operating Mode
Hardware Reset
Software Reset Individual Reset
Stop Mode
MA0–MA14
Driven High
Previous State
Previous State
Previous State
MA15
MCS3
Driven High
Driven High
Driven High
Driven High
Previous State
Driven High
Previous State
Driven High
MA16
MCS2
MCAS:
DRAM refresh disabled
DRAM refresh enabled
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Previous State
Driven High
Driven High
Driven Low
Previous State
Driven High
Driven High
Driven High
MA17
MCS1
MRAS
:
DRAM refresh disabled
DRAM refresh enabled
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
Previous State
Driven High
Driven High
Driven Low
Previous State
Driven High
Driven High
Driven High
MCS0
Driven High
Driven High
Driven High
Driven High
MWR
Driven High
Driven High
Driven High
Driven High
MRD
Driven High
Driven High
Driven High
Driven High
Table 1-5
External Memory Interface (EMI) Signals (Continued)
Signal Name
Signal
Type
State during
Reset
Signal Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSPCOMMANDUM | Universal Command Converter for DSP User＇s Manual |
| DSPCOMMPARALLELUM | Parallel Port Command Converter for DSP User＇s Manual |
| DSPCOMMPCIUM | PCI Command Converter for DSP User＇s Manual |
| DSPG4001-71 | Telecommunication IC |
| DSPG5002 | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSPF3-S7-120V | 制造商:Black Box Corporation 功能描述:DIGITAL SIGNAGE POWER FILTER |
| DSPF3-S7-120V-W1 | 制造商:Black Box Corporation 功能描述:1 YEAR WARRANTY FOR DSPF3-S7-120V |
| DSPF3-S7-120V-W3 | 制造商:Black Box Corporation 功能描述:3 YEAR WARRANTY FOR DSPF3-S7-120V |
| DSPF56362PV100 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DSPFPK52 | 制造商:BARRY CONTROLS/VLIER 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。