參數(shù)資料
型號： DSP56F803E
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： 16-bit Digital Signal Controllers
中文描述： 16位數(shù)字信號控制器
文件頁數(shù)： 3/52頁
文件大小： 414K
代理商： DSP56F803E
56F803 Technical Data, Rev. 15
Freescale Semiconductor
3
56F803 Block Diagram
JTAG/
OnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
Program Controller
and
Hardware Looping Unit
Data ALU
16 x 16 + 36
→
36-Bit MAC
Three 16-bit Input Registers
Two 36-bit Accumulators
Address
Generation
Unit
Bit
Manipulation
Unit
PLL
Clock Gen
16-Bit
56800
Core
PAB
PDB
XDB2
CGDB
XAB1
XAB2
XTAL
EXTAL
INTERRUPT
CONTROLS
IPBB
CONTROLS
IPBus Bridge
(IPBB)
MODULE CONTROLS
ADDRESS BUS [8:0]
DATA BUS [15:0]
COP RESET
RESET
IRQA
IRQB
Applica-
tion-Specific
Memory &
Peripherals
Interrupt
Controller
Program Memory
32252 x 16 Flash
512 x 16 SRAM
Boot Flash
2048 x 16 Flash
Data Memory
4096 x 16 Flash
2048 x 16 SRAM
COP/
Watchdog
SPI
or
GPIO
SCI
or
GPIO
Quad Timer D
A/D1
A/D2
VREF
ADC
4
2
2
4
4
3
6
PWM Outputs
Fault Inputs
PWMA
16
16
VCAPC
V
DD
V
SS
V
DDA
V
SSA
6
2
6
6*
EXTBOOT
Current Sense Inputs
3
Quadrature
Decoder 0 /
Quad Timer A
CAN 2.0A/B
2
CLKO
External
Address Bus
Switch
External
Data Bus
Switch
Bus
Control
External
Bus
Interface
Unit
RD Enable
WR Enable
DS Select
PS Select
10
16
6
A[00:05]
A[06:15] or
GPIO-E2:E3 &
GPIO-A0:A7
D[00:15]
4
Quad Timer C
Quad Timer B
*
includes TCS pin which is reserved for factory use and is tied to
VSS
56F803 General Description
Up to 40 MIPS at 80MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
Hardware DO and REP loops
MCU-friendly instruction set supports both DSP and
controller functions: MAC, bit manipulation unit, 14
addressing modes
31.5K
×
16-bit words (64KB) Program Flash
512
×
16-bit words (1KB) Program RAM
4K
×
16-bit words (8KB) Data Flash
2K
×
16-bit words (4KB) Data RAM
2K
×
16-bit words (4KB) Boot Flash
Up to 64K
×
16-bit words each of external Program
and Data memory
6-channel PWM module
Two 4-channel 12-bit ADCs
Quadrature Decoder
CAN 2.0 B module
Serial Communication Interface (SCI)
Serial Peripheral Interface (SPI)
Up to two General Purpose Quad Timers
JTAG/OnCE
TM
port for debugging
16 shared GPIO lines
100–pin LQFP package
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F803EVM 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F803 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
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