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| 型號： | DSP56303VF100R2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 95/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 24BIT 100MHZ 196-BGA |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | DSP563xx |
| 類型： | 定點(diǎn) |
| 接口： | 主機(jī)接口，SSI，SCI |
| 時鐘速率： | 100MHz |
| 非易失內(nèi)存： | ROM（576 B） |
| 芯片上RAM： | 24kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 196-LBGA |
| 供應(yīng)商設(shè)備封裝： | 196-MAPBGA（15x15） |
| 包裝： | 帶卷 (TR) |
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Power Consumption Considerations
DSP56303 Technical Data, Rev. 11
Freescale Semiconductor
4-3
Consider all device loads as well as parasitic capacitance due to PCB traces when you calculate
capacitance. This is especially critical in systems with higher capacitive loads that could create higher
transient currents in the VCC and GND circuits.
All inputs must be terminated (that is, not allowed to float) by CMOS levels except for the three pins with
internal pull-up resistors (TRST, TMS, DE).
Take special care to minimize noise levels on the VCCP, GNDP, and GNDP1 pins.
The following pins must be asserted after power-up: RESET and TRST.
If multiple DSP devices are on the same board, check for cross-talk or excessive spikes on the supplies due
to synchronous operation of the devices.
RESET
must be asserted when the chip is powered up. A stable EXTAL signal should be supplied before
deassertion of RESET.
At power-up, ensure that the voltage difference between the 5 V tolerant pins and the chip VCC never
exceeds 3.5 V.
4.3 Power Consumption Considerations
Power dissipation is a key issue in portable DSP applications. Some of the factors affecting current consumption
are described in this section. Most of the current consumed by CMOS devices is alternating current (ac), which is
charging and discharging the capacitances of the pins and internal nodes.
Current consumption is described by this formula:
Equation 3:
Where:
C
=
node/pin capacitance
V
=
voltage swing
f
=
frequency of node/pin toggle
Equation 4:
The maximum internal current (ICCImax) value reflects the typical possible switching of the internal buses on best-
case operation conditions—not necessarily a real application case. The typical internal current (ICCItyp) value
reflects the average switching of the internal buses on typical operating conditions.
Perform the following steps for applications that require very low current consumption:
1.
Set the EBD bit when you are not accessing external memory.
2.
Minimize external memory accesses, and use internal memory accesses.
3.
Minimize the number of pins that are switching.
4.
Minimize the capacitive load on the pins.
5.
Connect the unused inputs to pull-up or pull-down resistors.
Example 4-1. Current Consumption
For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, with a 66 MHz clock, toggling at its maximum possible rate (33
MHz), the current consumption is expressed in Equation 4.
IC
V
f
×
=
I
50
10
12
–
×
3.3
×
33
×
10
6
×
5.48 mA
==
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