參數(shù)資料
型號(hào)： DS2407V
英文描述： Dual Addressable Switch Plus 1K.Bit Memory
中文描述： 雙尋址開(kāi)關(guān)與1K.Bit記憶
文件頁(yè)數(shù)： 18/31頁(yè)
文件大?。?/td> 194K
代理商： DS2407V
DS2407
012099 18/31
TWO–CHANNEL WRITE
Figure 9C
1–WIRE
PIO–A
PIO–B
PIO–A
PIO–B
SYNCHRONOUS MODE
ASYNCHRONOUS MODE
A1
B1
A2
B2
A3
B3
A4
B4
A1
A2
A3
A4
B1
B2
B3
B4
A1
A2
A3
A4
B1
B2
B3
B4
td1
15
μ
s < td1 < 60
μ
s
200 ns < td0 < 300 ns
1–WIRE BUS SYSTEM
The 1–Wire bus is a system which has a single bus mas-
ter and one or more slaves. In all instances, the DS2407
is a slave device. The bus master is typically a micro-
controller. The discussion of this bus system is broken
down into three topics: hardware configuration, transac-
tion sequence, and 1–Wire signaling (signal type and
timing). A 1–Wire protocol defines bus transactions in
terms of the bus state during specified time slots that are
initiated on the falling edge of sync pulses from the bus
master. For a more detailed protocol description, please
refer to Chapter 4 of the Book of DS19xx iButton Stan-
dards.
HARDWARE CONFIGURATION
The 1–Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive it
at the appropriate time. To facilitate this, each device
attached to the 1–Wire bus must have an open drain
connection or 3–state outputs. The DS2407 is an open
drain part with an internal circuit equivalent to that
shown in Figure 10. The bus master can be the same
equivalent circuit. If a bidirectional pin is not available,
separate output and input pins can be tied together.
The bus master requires a pull–up resistor at the master
end of the bus, with the bus master circuit equivalent to
the one shown in Figures 11a and 11b. The value of the
pull–up resistor should be approximately 5k
for short
line lengths. The interface between bus master and
1–Wire bus may be reduced to a single pull–up resistor
(open drain master) or two resistors plus transistor
(TTL–type master) if the EPROM section of the DS2407
is already programmed before the final installation.
A multidrop bus consists of a 1–Wire bus with multiple
slaves attached. The 1–Wire bus has a maximum data
rate of 16.3k bits per second. If the bus master is also
required to perform programming of the EPROM por-
tions of the DS2407, a programming supply capable of
delivering up to 10 milliamps at 12 volts for 480
μ
s is
required. Non–EPROM devices cannot be present dur-
ing programming. The idle state for the 1–Wire bus is
high. If, for any reason, a transaction needs to be sus-
pended, the bus MUST be left in the idle state if the
transaction is to resume. If this does not occur and the
bus is left low for more than 120
μ
s, one or more of the
devices on the bus may be reset. If the 1–Wire bus
remains low for more than 5 ms and the DS2407 is not
powered externally it may lose its current status and
switch off both PIOs.
TRANSACTION SEQUENCE
The sequence for accessing the DS2407 via the 1–Wire
port is as follows:
Initialization
ROM Function Command
Memory Function Command
Read Memory/Write Memory or Channel Access
相關(guān)PDF資料
PDF描述
DS2407X Dual Addressable Switch Plus 1K.Bit Memory
DS2417X 1-Wire Time Chip With Interrupt
DS2417 1-Wire Time Chip With Interrupt
DS2417P 1-Wire Time Chip With Interrupt
DS2417V 1-Wire Time Chip With Interrupt
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2407X 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Addressable Switch Plus 1K.Bit Memory
DS2408 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:1-Wire 8-Channel Addressable Switch
DS2408_10 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:1-Wire 8-Channel Addressable Switch
DS2408S 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
DS2408S/R 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:1-Wire 8-Channel Addressable Switch
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