參數(shù)資料
型號： DS21Q44T
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 44/105頁
文件大?。?/td> 620K
代理商： DS21Q44T
DS21Q44
44 of 105
TDS0M: TRANSMIT DS0 MONITOR REGISTER (Address=A9 Hex)
(MSB)
B1
(LSB)
B8
B2
B3
B4
B5
B6
B7
SYMBOL
POSITION
NAME AND DESCRIPTION
B1
TDS0M.7
Transmit DS0 Channel Bit 1.
MSB of the DS0 channel (first
bit to be transmitted).
Transmit DS0 Channel Bit 2.
Transmit DS0 Channel Bit 3.
Transmit DS0 Channel Bit 4.
Transmit DS0 Channel Bit 5.
Transmit DS0 Channel Bit 6.
Transmit DS0 Channel Bit 7.
Transmit DS0 Channel Bit 8.
LSB of the DS0 channel (last
bit to be transmitted).
B2
B3
B4
B5
B6
B7
B8
TDS0M.6
TDS0M.5
TDS0M.4
TDS0M.3
TDS0M.2
TDS0M.1
TDS0M.0
CCR5: COMMON CONTROL REGISTER 5
(Address=AA Hex)
[Repeated here from section 6 for convenience]
(MSB)
–
(LSB)
RCM0
RESALGN
TESALGN
RCM4
RCM3
RCM2
RCM1
SYMBOL
POSITION
NAME AND DESCRIPTION
–
CCR5.7
CCR5.6
Not Assigned.
Should be set to zero when written
Receive Elastic Store Align.
Setting this bit from a zero to a
one may force the receive elastic store’s write/read pointers to a
minimum separation of half a frame. No action will be taken if
the pointer separation is already greater or equal to half a frame.
If pointer separation is less then half a frame, the command will
be executed and data will be disrupted. Should be toggled after
RSYSCLK has been applied and is stable. Must be cleared and
set again for a subsequent align. See Section 13 for details.
Transmit Elastic Store Align.
Setting this bit from a zero to a
one may force the transmit elastic store’s write/read pointers to
a minimum separation of half a frame. No action will be taken
if the pointer separation is already greater or equal to half a
frame. If pointer separation is less then half a frame, the
command will be executed and data will be disrupted. Should
be toggled after TSYSCLK has been applied and is stable. Must
be cleared and set again for a subsequent align. See Section 13
for details.
Receive Channel Monitor Bit 4.
MSB of a channel decode
that determines which receive channel data will appear in the
RDS0M register. See Section 9 for details.
RESALGN
TESALGN
CCR5.5
RCM4
CCR5.4
相關(guān)PDF資料
PDF描述
DS21Q44TN MICROSWITCH, SPDT, SIM ROLLER LEVER; Current, contact AC:5A; Force, operating:91.75gf; Travel, pre:16.0mm; Centres, fixing LxW:22.2mm; Temp, op. max:120(degree C); Temp, op. min:-40(degree C); Length / Height, external:9.25mm; Width, RoHS Compliant: Yes
DS2251T-128-16 CONNECTOR ACCESSORY
DS2251T-32-16 128k Soft Microcontroller Module
DS2251T-64-16 CONNECTOR ACCESSORY
DS2251 128k Soft Microcontroller Module
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21Q44T+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q44TN 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q48 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q48A3N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q48B 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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