參數(shù)資料
型號: DS1982
廠商: Maxim Integrated Products, Inc.
英文描述: UniqueWare iButton(UniqueWare iButton標準的EPROM)
中文描述: 1K位只添加iButton®
文件頁數(shù): 10/21頁
文件大?。?/td> 139K
代理商: DS1982
DS1982
062598 10/21
READ MEMORY [F0H]
The Read Memory command is used to read data from
the 1024–bit EPROM data field. The bus master follows
the command byte with a two byte address
(TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting
byte location within the data field. An 8–bit CRC of the
command byte and address bytes is computed by the
DS1982 and read back by the bus master to confirm that
the correct command word and starting address were
received. If the CRC read by the bus master is incorrect,
a Reset Pulse must be issued and the entire sequence
must be repeated. If the CRC received by the bus mas-
ter is correct, the bus master issues read time slots and
receives data from the DS1982 starting at the initial
address and continuing until the end of the 1024–bit
data field is reached or until a Reset Pulse is issued. If
reading occurs through the end of memory space, the
bus master may issue eight additional read time slots
and the DS1982 will respond with an 8–bit CRC of all
data bytes read from the initial starting byte through the
last byte of memory. After the CRC is received by the
bus master, any subsequent read time slots will appear
as logical 1s until a Reset Pulse is issued. Any reads
ended by a Reset Pulse prior to reaching the end of
memory will not have the 8–bit CRC available.
Typically a 16–bit CRC would be stored with each page
of data to insure rapid, error–free data transfers that
eliminate having to read a page multiple times to deter-
mine if the received data is correct or not. (See Book of
DS19xx iButton Standards, Chapter 7 for the recom-
mended file structure to be used with the 1–Wire envi-
ronment.) If CRC values are imbedded within the data, a
Reset Pulse may be issued at the end of memory space
during a Read Memory command.
READ STATUS [AAH]
The Read Status command is used to read data from
the EPROM Status data field. The bus master follows
the command byte with a two byte address
(TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting
byte location within the data field. An 8–bit CRC of the
command byte and address bytes is computed by the
DS1982 and read back by the bus master to confirm that
the correct command word and starting address were
received. If the CRC read by the bus master is incorrect,
a Reset Pulse must be issued and the entire sequence
must be repeated. If the CRC received by the bus mas-
ter is correct, the bus master issues read time slots and
receives data from the DS1982 starting at the supplied
address and continuing until the end of the EPROM Sta-
tus data field is reached. At that point the bus master will
receive an 8–bit CRC that is the result of shifting into the
CRC generator all of the data bytes from the initial start-
ing byte through the final factory–programmed byte that
contains the 00h value.
This feature is provided since the EPROM Status
information may change over time making it impossible
to program the data once and include an accompanying
CRC that will always be valid. Therefore, the Read Sta-
tus command supplies an 8–bit CRC that is based on
and always is consistent with the current data stored in
the EPROM Status data field.
After the 8–bit CRC is read, the bus master will receive
logical 1s from the DS1982 until a Reset Pulse is issued.
The Read Status command sequence can be exited at
any point by issuing a Reset Pulse.
READ DATA/GENERATE 8–BIT CRC [C3H]
The Read Data/Generate 8–bit CRC command is used
to read data from the 1024–bit EPROM memory field.
The bus master follows the command byte with a two
byte address (TA1=(T7:T0), TA2=(T15:T8)) that indi-
cates a starting byte location within the data field. An
8–bit CRC of the command byte and address bytes is
computed by the DS1982 and read back by the bus
master to confirm that the correct command word and
starting address were received. If the CRC read by the
bus master is incorrect, a Reset Pulse must be issued
and the entire sequence must be repeated. If the CRC
received by the bus master is correct, the bus master
issues read time slots and receives data from the
DS1982 starting at the initial address and continuing
until the end of a 32–byte page is reached. At that point
the bus master will send eight additional read time slots
and receive an 8–bit CRC that is the result of shifting into
the CRC generator all of the data bytes from the initial
starting byte to the last byte of the current page. Once
the 8–bit CRC has been received, data is again read
from the 1024–bit EPROM data field starting at the next
page. This sequence will continue until the final page
and its accompanying CRC are read by the bus master.
Thus each page of data can be considered to be 33
bytes long, the 32 bytes of user–programmed EPROM
data and an 8–bit CRC that gets generated automati-
cally at the end of each page.
This type of read differs from the Read Memory com-
mand which simply reads each page until the end of
address space is reached. The Read Memory com-
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