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參數(shù)資料
| 型號(hào)： | DS16EV5110ASQX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC EQUALIZER VIDEO 3D+C 48-LLP |
| 產(chǎn)品培訓(xùn)模塊： | Signal Conditioning Applications |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 視頻均衡器 |
| 應(yīng)用： | HD 顯示器，DVI/HDMI |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-LLP（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DS16EV5110ASQX |
DES/Display
Processor
DVI/HDMI Sink
5m 28 AWG DVI/HDMI Cable
DS16EV5110A
DES/Display
Processor
DVI/HDMI Sink
25m 28 AWG DVI/HDMI Cable
SER/A/V
Decoder
DVI/HDMI Source
SER A/V
Decoder
DVI/HDMI Source
SER/A/V
Decoder
DVI/HDMI Source
DES/Display
Processor
DVI/HDMI Sink
25m 28 AWG DVI/HDMI Cable
DS16EV5110A
DVI/HDMI Repeater
1m 28 AWG DVI/HDMI Cable
SNLS301C – JULY 2008 – REVISED APRIL 2013
Typical Application
PIN DESCRIPTIONS
Pin Name
Pin Number
I/O(1), Type
Description
HIGH SPEED DIFFERENTIAL I/O
C_IN
1
I, CML
Inverting and non-inverting TMDS Clock inputs to the equalizer. An on-chip 50
terminating
C_IN+
2
resistor connects C_IN+ to VDD and C_IN- to VDD.
D_IN0
4
I, CML
Inverting and non-inverting TMDS Data inputs to the equalizer. An on-chip 50
terminating
D_IN0+
5
resistor connects D_IN0+ to VDD and D_IN0- to VDD.
D_IN1
8
I, CML
Inverting and non-inverting TMDS Data inputs to the equalizer. An on-chip 50
terminating
D_IN1+
9
resistor connects D_IN1+ to VDD and D_IN1- to VDD.
D_IN2
11
I, CML
Inverting and non-inverting TMDS Data inputs to the equalizer. An on-chip 50
terminating
D_IN2+
12
resistor connects D_IN2+ to VDD and D_IN2- to VDD.
C_OUT-
36
O, CML
Inverting and non-inverting TMDS outputs from the equalizer. Open collector.
C_OUT+
35
D_OUT0
33
O, CML
Inverting and non-inverting TMDS outputs from the equalizer. Open collector.
D_OUT0+
32
D_OUT1–
29
O, CML
Inverting and non-inverting TMDS outputs from the equalizer. Open collector.
D_OUT1+
28
D_OUT2
26
O, CML
Inverting and non-inverting TMDS outputs from the equalizer. Open collector.
D_OUT2+
25
Equalization Control
BST_0
23
I, LVCMOS
BST_0, BST_1, and BST_2 select the equalizer boost level for EQ channels. BST_0, BST_1,
BST_1
14
and BST_2 are internally pulled Low. See Table 2.
BST_2
37
Device Control
EN
44
I, LVCMOS
Enable Equalizer input. When held High, normal operation is selected. When held Low,
standby mode is selected. EN is internally pulled High. Signal is global to all Data and Clock
channels.
FEB
21
I, LVCMOS
Force External Boost. When held High, the equalizer boost setting is controlled by the
BST_[0:2] pins. When held Low, the equalizer boost level is controlled through the SMBus
(see Table 1) control pins. FEB is internally pulled High.
SD
45
O, LVCMOS
Equalizer Clock Channel Signal Detect Output. Produces a High when signal is detected.
POWER
VDD
3, 6, 7,
Power
VDD pins should be tied to the VDD plane through a low inductance path. A 0.1F bypass
10, 13,
capacitor should be connected between each VDD pin to the GND planes.
15, 46
GND
22, 24,
GND
Ground reference. GND should be tied to a solid ground plane through a low impedance
27, 30,
path.
31, 34
Exposed Pad
DAP
GND
The exposed pad at the center of the package must be connected to the ground plane.
(1)
Note: I = Input,O = Output, IO =Input/Output,
2
Copyright 2008–2013, Texas Instruments Incorporated
Product Folder Links: DS16EV5110A
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| DS16EV5110EVKC | 功能描述:KIT DEMO CATX CABLE EXTENDER RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
| DS16EV5110-EVKC | 制造商:Texas Instruments 功能描述:Evaluation Boards Multi-Channel Equalizer Optimized For Video Cable Extension Applications |
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| DS16EV5110-EVKH | 制造商:Texas Instruments 功能描述:Evaluation Kit For Video Equalizer For DVI, HDMI, And CAT5 Cables |
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