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參數(shù)資料
| 型號(hào)： | DS1280 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 3-Wire to Bytewide Converter Chip(3線至字節(jié)寬度（8位）轉(zhuǎn)換芯片) |
| 中文描述： | 3線，以Bytewide轉(zhuǎn)換器芯片（3線至字節(jié)寬度（8位）轉(zhuǎn)換芯片） |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | DS1280 |
DS1280
021998 10/11
CAPACITANCE
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
C
IN
10
pF
Output Capacitance
C
OUT
15
pF
NOTES:
1. All voltages are referenced to ground.
2. I
CC1
is measured with all outputs open and both the 3-wire serial port or the bytewide parallel port inactive.
3. I
CC2
is measured with all outputs open.
4. Measured at V
IH
= 2.0 V or V
IL
= 0.8V and 10ns maximum rise and fall time.
5. Measured at V
OH
= 2.4 V and V
OL
= 0.4V.
6. Measured with a load capacitance of 50 pF.
7. The 3-wire serial port will correctly read and write any static RAM with an effective access time of 200ns.
8. Propagation delay is the same for data going either way on the bytewide parallel bus.
9. Pins A0B through A18B, RST, DQ, CEB have pulldown resistors which will leak approximately 50
μ
A.
10.Arbitration byte must be accessed at a maximum clock frequency of 500 KHz with a symmetrical waveform.
TIMING DIAGRAM: WRITE DATA TRANSFER 3-WIRE SERIAL PORT (7)
RESET
CLOCK
DATA
INPUT/
OUTPUT
tCWH
tCCH
tF
tR
tCH
tCL
tCC
tDC
tCDH
O 1
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