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參數(shù)資料
| 型號(hào)： | DMC73C168 |
| 英文描述： | 8Bit Single Chip Microcontroller |
| 中文描述： | 8位單芯片微控制器 |
| 文件頁數(shù)： | 19/90頁 |
| 文件大?。?/td> | 742K |
| 代理商： | DMC73C168 |
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19
8Bit Single Chip Microcontroller
DMC73C167
The C, N and Z bits are used mostly for arithmetic operations, bit rotating, and conditional
branching. The carry (C) bit is used as the carry-in and the carry-out for most of the rotate
and arithmetic instructions. The sign(N) bit contains the most significant bit of the
desitination operand contents after instruction execution. The zero(Z) bit contains a 1 when
all bits of the destination operand are equal to zero after instruction execution.
The C, N, and Z status bits also have jump-on-condition instructions associated with them.
The global interrupt enable(I) bit must be set to 1 by the EINT instruction in order for any of
the individual interrupts (INTn) to be recognized by the CPU. The interrupt enable(I) bit can
be cleared by the DINT instruction or by execuiting a device RESET (see Section 4.8).
4.6 Program Counter (PC)
The DMC73C167's 16-bit program counter (PC) consists of two 8-bit registers in the
CPU which contain the MSB and the LSB, respectively, of a 16-bit address , the program
counter high (PCH) and program counter low (PCL). The PC acts as the 16-bit address
pointer of the opcodes and operands in the memory of the currently executing instruction.
Upon assertion of the RESET function, the MSB and the LSB of the PC are loaded into the
A and B registers of the register file (see Section 4.8).
4.7 Peripheral File Map
The peripheral file(PF) resides in location 0100h through 01FFh of the DMC73C167's
address space, as shown in Tables 4-2.
Note : The right-end column, headed "Value After Reset", indicates a reset initial value as
shown in Table 4-1.
Table 4-1. Description of "Value After Reset"
MSB
LSB
7
6
5
4
3
2
1
0
-
-
X
X
O
O
1
1
Becomes value "1" after RESET
Becomes value "0" after RESET
Unkown value after RESET
Not Used
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