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參數(shù)資料
| 型號： | DM9000E |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ISA TO ETHERNET MAC CONTROLLER WITH INTEGRATED 10/100 PHY |
| 中文描述： | ISA以以太網(wǎng)MAC控制器，它集成10/100網(wǎng)卡芯片 |
| 文件頁數(shù)： | 27/54頁 |
| 文件大?。?/td> | 575K |
| 代理商： | DM9000E |
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DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
Final
Version: DM9000-DS-F02
June 26, 2002
27
8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05
This register contains the advertised abilities of the link partner when received during Auto-negotiation
Bit
5.15
Bit Name
NP
Default
0, RO
Description
Next Page Indication
0 = Link partner, no next page available
1 = Link partner, next page available
Acknowledge
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
The PHY's auto-negotiation state machine will automatically
control this bit from the incoming FLP bursts. Software should not
attempt to write to this bit
Remote Fault
1 = Remote fault indicated by link partner
0 = No remote fault indicated by link partner
Reserved
Write as 0, ignore on read
Flow Control Support
1 = Controller chip supports flow control ability by link partner
0 = Controller chip doesn’t support flow control ability by link
partner
100BASE-T4 Support
1 = 100BASE-T4 is supported by the link partner
0 = 100BASE-T4 is not supported by the link partner
100BASE-TX Full Duplex Support
1 = 100BASE-TX full duplex is supported by the link partner
0 = 100BASE-TX full duplex is not supported by the link partner
100BASE-TX Support
1 = 100BASE-TX half duplex is supported by the link partner
0 = 100BASE-TX half duplex is not supported by the link partner
10BASE-T Full Duplex Support
1 = 10BASE-T full duplex is supported by the link partner
0 = 10BASE-T full duplex is not supported by the link partner
10BASE-T Support
1 = 10BASE-T half duplex is supported by the link partner
0 = 10BASE-T half duplex is not supported by the link partner
<00000>, RO Protocol Selection Bits
Link partner’s binary encoded protocol selector
5.14
ACK
0, RO
5.13
RF
0, RO
5.12-5.11
RESERVED
X, RO
5.10
FCS
0, RW
5.9
T4
0, RO
5.8
TX_FDX
0, RO
5.7
TX_HDX
0, RO
5.6
10_FDX
0, RO
5.5
10_HDX
0, RO
5.4-5.0
Selector
8.7 Auto-negotiation Expansion Register (ANER)- 06
6.15-6.5
RESERVED
X, RO
Reserved
Write as 0, ignore on read
Local Device Parallel Detection Fault
PDF = 1: A fault detected via parallel detection function.
PDF = 0: No fault detected via parallel detection function
Link Partner Next Page Able
LP_NP_ABLE = 1: Link partner, next page available
LP_NP_ABLE = 0: Link partner, no next page
Local Device Next Page Able
6.4
PDF
0, RO/LH
6.3
LP_NP_ABLE
0, RO
6.2
NP_ABLE
0,RO/P
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| DM9002CN | Quad 2-input NAND Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9000E-H | 功能描述:以太網(wǎng)開發(fā)工具 ETHERNET CONTROLLER HEADER BRD 50x40mm RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| DM9000EP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:100; Interface Type:MII; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9000電路圖-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:型號DM9000電路圖1 |
| DM9000電路圖-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DM9000電路圖-2 |
| DM9002CJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate |
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