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參數(shù)資料
| 型號： | DM9000E |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ISA TO ETHERNET MAC CONTROLLER WITH INTEGRATED 10/100 PHY |
| 中文描述： | ISA以以太網(wǎng)MAC控制器，它集成10/100網(wǎng)卡芯片 |
| 文件頁數(shù)： | 22/54頁 |
| 文件大小： | 575K |
| 代理商： | DM9000E |
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DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
22
Final
Version: DM9000-DS-F02
June 26, 2002
RESERVED
RESERVED
10
11
20-21
22-23
8. MII Register Description
AD
D
00 CONTROL Reset
Name
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Loop
back
TX FDX
Cap.
0
0
FLP Rcv
Ack
LP
Ack
Speed
Select
TX HDX
Cap.
0
1
Remote
Fault
LP
RF
Auto-N
Enable
10 FDX
Cap.
0
1
Reserved
Power
Down
10 HDX
Cap.
0
1
Isolate
Restart
Auto-N
Full
Duplex
Coll.
Test
Reserved
01
STATUS
T4
Cap.
0
1
Next
Page
LP
Next
Page
Reserved
Pream.
Supr.
0
Auto-N
Compl.
0
Remote
Fault
0
Auto-N
Cap.
0
Link
Status
0
Version No.
Jabber
Detect
0
Extd
Cap.
0
02
03
04
PHYID1
PHYID2
Auto-Neg.
Advertise
Link Part.
Ability
0
0
0
1
1
Model No.
TX HDX
Adv
LP
TX HDX
FC
Adv
LP
FC
T4
Adv
LP
T4
TX FDX
Adv
LP
TX FDX
10 FDX
Adv
LP
10 FDX
10 HDX
Adv
LP
10 HDX
Advertised Protocol Selector Field
05
Reserved
Link Partner Protocol Selector Field
06
Auto-Neg.
Expansion
Reserved
Pardet
Fault
LP Next
Pg Able
Next Pg
Able
New Pg
Rcv
LP
AutoN
Cap.
Remote
LoopOut
16 Specified
Config.
17 Specified
Conf/Stat
18
Conf/Stat
BP
4B5B
100
FDX
Rsvd
BP
SCR
100
HDX
LP
Enable
BP
ALIGN
10
FDX
HBE
Enable
BP_AD
POK
10 HDX
Rsvd
TX
Rsvd
Rsvd
Force
100LNK
Reserved
RPDCTR
-EN
Reset
St. Mch
Pream.
Supr.
Auto-N. Monitor Bit [3:0]
Sleep
mode
Reserved
PHY ADDR [4:0]
10T
SQUE
Enable
JAB
Enable
10T
Serial
Reserved
Polarity
Reverse
Key to Default
In the register description that follows, the default
column takes the form:
<Reset Value>, <Access Type> / <Attribute(s)>
Where
：
<Reset Value>:
1
0
X
(PIN#)
<Access Type>:
RO = Read Only
RW = Read/Write
Bit set to logic one
Bit set to logic zero
No default value
Value latched from pin # at reset
<Attribute (s)>:
SC = Self Clearing
P = Value Permanently Set
LL = Latching Low
LH = Latching High
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| DM9002CN | Quad 2-input NAND Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9000E-H | 功能描述:以太網(wǎng)開發(fā)工具 ETHERNET CONTROLLER HEADER BRD 50x40mm RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| DM9000EP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 100LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:100; Interface Type:MII; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9000電路圖-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:型號DM9000電路圖1 |
| DM9000電路圖-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DM9000電路圖-2 |
| DM9002CJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate |
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