參數(shù)資料
型號(hào)： DM9000AEP
廠商： Electronic Theatre Controls, Inc.
英文描述： Ethernet Controller with General Processor Interface
中文描述： 以太網(wǎng)控制器與通用處理器接口
文件頁(yè)數(shù)： 29/56頁(yè)
文件大?。?/td> 1744K
代理商： DM9000AEP
DM9000A
Ethernet Controller with General Processor Interface
suppression
1 = PHY will accept management frames with preamble
suppressed
0 = PHY will not accept management frames with preamble
suppressed
Auto-negotiation
Complete
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
Remote fault
0, RO/LH
1 = Remote fault condition detected (cleared on read or by a
chip reset). Fault criteria and detection method is DM9000A
implementation specific. This bit will set after the RF bit in
the ANLPAR (bit 13, register address 05) is set
0 = No remote fault condition detected
Auto-negotiation
ability
1 = DM9000A is able to perform auto-negotiation
0 = DM9000A is not able to perform auto-negotiation
Link status
0,RO/LL Link Status
1 = Valid link is established (for either 10Mbps or 100Mbps
operation)
0 = Link is not established
The link status bit is implemented with a latching function, so
that the occurrence of a link failure condition causes the link
status bit to be cleared and remain cleared until it is read via
the management interface
Jabber detect
0, RO/LH
1 = Jabber condition detected
0 = No jabber
This bit is implemented with a latching function. Jabber
conditions will set this bit unless it is cleared by a read to this
register through a management interface or a DM9000A reset.
This bit works only in 10Mbps mode
Extended
capability
0 = Basic register capable only
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
29
1.5
0,RO
Auto-negotiation Complete
1.4
Remote Fault
1.3
1,RO/P Auto Configuration Ability
1.2
1.1
Jabber Detect
1.0
1,RO/P
Extended Capability
1 = Extended register capable
8.3 PHY ID Identifier Register #1 (PHYID1) - 02
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