參數(shù)資料
型號(hào): DM9000AEP
廠商: Electronic Theatre Controls, Inc.
英文描述: Ethernet Controller with General Processor Interface
中文描述: 以太網(wǎng)控制器與通用處理器接口
文件頁數(shù): 24/56頁
文件大?。?/td> 1744K
代理商: DM9000AEP
DM9000A
Ethernet Controller with General Processor Interface
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
24
6.39 Interrupt Status Register (FEH)
Bit
Name
Default
Description
7
IOMODE
T0, RO
0 : 16-bit mode
1: 8-bit mode
Reserved
Link Status Change
Transmit Underrun
Receive Overflow Counter Overflow
Receive Overflow
Packet Transmitted
Packet Received
6
5
4
3
2
1
0
RESERVED
LNKCHG
UDRUN
ROO
ROS
PT
PR
RO
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
6.40 Interrupt Mask Register (FFH)
Bit
Name
Default
Description
7
PAR
HPS0,RW
Enable the SRAM read/write pointer to automatically return to the start
address when pointer addresses are over the SRAM size. Driver needs to
set. When driver sets this bit, REG_F5 will set to 0Ch automatically
Reserved
Enable Link Status Change Interrupt
Enable Transmit Underrun Interrupt
Enable Receive Overflow Counter Overflow Interrupt
Enable Receive Overflow Interrupt
Enable Packet Transmitted Interrupt
Enable Packet Received Interrupt
6
5
4
3
2
1
0
RESERVED
LNKCHGI
UDRUNI
ROOI
ROI
PTI
PRI
RO
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
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