參數(shù)資料
型號: DAC1005D750HW
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 10-bit DAC, up to 750 Msps; 2x 4x and 8x interpolating
封裝: DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT638-1.html<1<Always Pb-free,;DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT6
文件頁數(shù): 42/42頁
文件大?。?/td> 353K
代理商: DAC1005D750HW
NXP Semiconductors
DAC1005D750
Dual 10-bit DAC, up to 750 Msps; 4x and 8x interpolating
NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 June 2011
Document identifier: DAC1005D750
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
10.1
10.2
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.3
10.3.1
10.3.2
10.4
10.5
10.5.1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal characteristics . . . . . . . . . . . . . . . . . . 8
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . 13
General description . . . . . . . . . . . . . . . . . . . . 13
Serial peripheral interface. . . . . . . . . . . . . . . . 13
Protocol description . . . . . . . . . . . . . . . . . . . . 13
SPI timing description. . . . . . . . . . . . . . . . . . . 14
Detailed descriptions of registers . . . . . . . . . . 15
Detailed register descriptions . . . . . . . . . . . . . 17
Recommended configuration . . . . . . . . . . . . . 22
Input data . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Dual-port mode. . . . . . . . . . . . . . . . . . . . . . . . 22
Interleaved mode . . . . . . . . . . . . . . . . . . . . . . 22
Input clock . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Timing when using the internal PLL
(PLL on) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Timing when using an external PLL
(PLL off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FIR filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Quadrature modulator and Numerically
Controlled Oscillator (NCO) . . . . . . . . . . . . . . 26
NCO in 32-bit . . . . . . . . . . . . . . . . . . . . . . . . . 27
Low-power NCO. . . . . . . . . . . . . . . . . . . . . . . 27
Minus_3dB function . . . . . . . . . . . . . . . . . . . . 27
x / (sin x). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DAC transfer function . . . . . . . . . . . . . . . . . . . 28
Full-scale current . . . . . . . . . . . . . . . . . . . . . . 28
Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Full-scale current adjustment . . . . . . . . . . . . . 29
Digital offset adjustment . . . . . . . . . . . . . . . . . 30
Analog output . . . . . . . . . . . . . . . . . . . . . . . . . 31
Auxiliary DACs . . . . . . . . . . . . . . . . . . . . . . . . 32
Output configuration . . . . . . . . . . . . . . . . . . . . 32
Basic output configuration . . . . . . . . . . . . . . . 32
DC interface to an Analog Quadrature
Modulator (AQM) . . . . . . . . . . . . . . . . . . . . . . 33
10.5.2
10.6
10.7
10.7.1
10.7.2
10.7.3
10.8
10.9
10.10
10.10.1
10.10.2
10.11
10.12
10.13
10.14
10.14.1
10.14.2
10.14.3
AC interface to an Analog Quadrature
Modulator (AQM) . . . . . . . . . . . . . . . . . . . . . . 35
Power and grounding. . . . . . . . . . . . . . . . . . . 36
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 37
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 38
Glossary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Revision history . . . . . . . . . . . . . . . . . . . . . . . 39
Legal information . . . . . . . . . . . . . . . . . . . . . . 40
Data sheet status. . . . . . . . . . . . . . . . . . . . . . 40
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Contact information . . . . . . . . . . . . . . . . . . . . 41
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
10.15
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
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