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| 型號(hào)： | DAC1005D750HW |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | Dual 10-bit DAC, up to 750 Msps; 2x 4x and 8x interpolating |
| 封裝： | DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT638-1.html<1<Always Pb-free,;DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT6 |
| 文件頁(yè)數(shù)： | 30/42頁(yè) |
| 文件大?。?/td> | 353K |
| 代理商： | DAC1005D750HW |
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DAC1005D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 June 2011
30 of 42
NXP Semiconductors
DAC1005D750
Dual 10-bit DAC, up to 750 Msps; 4x and 8x interpolating
The settings applied to DAC_A_GAIN_FINE[5:0] (see
Table 20 “DAC_A_Cfg_2 register
(address 0Ah) bit description”
) and to DAC_B_GAIN_FINE[5:0] (see
Table 23
“DAC_B_Cfg_2 register (address 0Dh) bit description”
) define the fine variation of the
full-scale current (see
Table 40
).
Table 40.
Default settings are shown highlighted.
DAC_GAIN_FINE[5:0]
Decimal
32
...
0
...
31
The coding of the fine gain adjustment is two’s complement.
10.11 Digital offset adjustment
When the DAC1005D750 analog output is DC connected to the next stage, the digital
offset correction can be used to adjust the common-mode level at the output of the DAC.
It adds an offset at the end of the digital part, just before the DAC.
The settings applied to DAC_A_OFFSET[11:0] (see
Table 19 “DAC_A_Cfg_1 register
(address 09h) bit description”
and
Table 21 “DAC_A_Cfg_3 register (address 0Bh) bit
description”
) and to “DAC_B_OFFSET[11:0]” (see
Table 22 “DAC_B_Cfg_1 register
(address 0Ch) bit description”
and
Table 24 “DAC_B_Cfg_3 register (address 0Eh) bit
description”
) define the range of variation of the digital offset (see
Table 41
).
13
14
15
1101
1110
1111
20.0
21.0
22.0
I
O(fs)
fine adjustment
Delta I
O(fs)
Two’s complement
10 0000
...
00 0000
...
01 1111
10.3 %
...
0
...
+10 %
Table 39.
Default settings are shown highlighted.
DAC_GAIN_COARSE[3:0]
Decimal
I
O(fs)
coarse adjustment
…continued
I
O(fs)
(mA)
Binary
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC1005D750HW/C1,5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DUAL 10BITS DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1006 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DOUBLE-BUFFERED D TO A CONVERTERS |
| DAC1006 WAF | 制造商:Texas Instruments 功能描述: |
| DAC1006LCJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DOUBLE-BUFFERED D TO A CONVERTERS |
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