參數(shù)資料
型號: DA28F016SA-120
廠商: INTEL CORP
元件分類: DRAM
英文描述: 28F016SA 16-MBIT (1 MBIT X 16, 2 MBIT X 8)FlashFile MEMORY
中文描述: 1M X 16 FLASH 12V PROM, 120 ns, PDSO56
封裝: 23.70 X 16 MM, 1.80 MM HEIGHT, SSOP-56
文件頁數(shù): 21/63頁
文件大?。?/td> 635K
代理商: DA28F016SA-120
E
4.5
28F016SV FlashFile MEMORY
21
Compatible Status Register
WSMS
ESS
ES
DWS
VPPS
R
R
R
7
6
5
4
3
2
1
0
NOTES:
CSR.7 = WRITE STATE MACHINE STATUS
1 = Ready
0 = Busy
RY/BY# output or WSMS bit must be checked to
determine completion of an operation (erase,
erase suspend, or data program) before the
appropriate Status bit (ESS, ES or DWS) is
checked for success.
CSR.6 = ERASE-SUSPEND STATUS
1 = Erase Suspended
0 = Erase in Progress/Completed
CSR.5 = ERASE STATUS
1 = Error in Block Erasure
0 = Successful Block Erase
If DWS and ES are set to
“1” during an erase
attempt, an improper command sequence was
entered. Clear the CSR and attempt the
operation again.
CSR.4 = DATA-WRITE STATUS
1 = Error in Data Program
0 = Data Program Successful
CSR.3 = V
PP
STATUS
1 = V
PP
Error Detect, Operation Abort
0 = V
PP
OK
The VPPS bit, unlike an A/D converter, does not
provide continuous indication of V
PP
level. The
WSM interrogates V
PP
’s level only after the Data
Program or Erase command sequences have
been entered, and informs the system if V
PP
has
not been switched on. VPPS is not guaranteed to
report accurate feedback between V
PPLK
(max)
and V
PPH1
(min), between V
PPH1
(max) and
V
PPH2
(min) and above V
PPH2
(max).
CSR.2–0 = RESERVED FOR FUTURE ENHANCEMENTS
These bits are reserved for future use; mask them out when polling the CSR.
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