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參數(shù)資料
| 型號： | D2-45057-QR-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL AMP PWM CTRLR 68QFN |
| 標準包裝： | 3,000 |
| 系列： | D2Audio™ |
| 類型： | D 類 |
| 輸出類型： | 2 通道（立體聲） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 30W x 1 @ 8 歐姆 |
| 電源電壓： | 9 V ~ 26 V |
| 安裝類型： | 表面貼裝 |
| 供應商設備封裝： | 68-QFN 裸露焊盤（10x10） |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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D2-45057, D2-45157
23
FN6785.0
July 29, 2010
OCFG0, OCFG1 Input Pins
These two pins define the configuration of the four output
stages. They are logic level input pins, and are connected
to logic high (PWMVDD) or logic ground (PWMGND) to
establish which of the four output configurations is used
in the design. Refer to “Pin Description” starting on
page 10 for additional reference and definition.
nERROR/CFG0 and PSSYNC/CFG1 Pins
These pins define the amplifier configuration mode that
the firmware uses in operating the amplifier. In addition
to the OCFG0 and OCFG1 pins that set operation of the
output stages, these nERROR/CFG0 and PSSYNC/CFG1
pins also establish audio signal processing path
assignments and set up monitoring and protection for
the configuration mode. The configuration pin logic levels
are assigned by pull-up or pull-down resistors installed
on that application.
The configuration defined by these pins is assigned when
the D2-45057, D2-45157 device exits its reset state,
when at that time, the logic status of these
PSSYNC/CFG1 and nERROR/CFG0 pins are latched into
internal device registers. These are shared-function pins,
and after firmware begins executing, their functions are
further description on these pins and their shared
functions.
Temperature Monitoring
The TEMPREF/SCK, TEMP1/MOSI, and TEMPCOM/TIO0
pins are used in a firmware-controlled algorithm to
monitor temperature. These pins share other functions
(refer to multiple-purpose pins descriptions in Table 5 on
page 24) and during firmware execution, operate as
inputs and outputs for this measurement algorithm.
Figure 16 shows the circuit for this temperature
measurement implementation.
A NTC (Negative Temperature Coefficient) 100kΩ resistor
connects to the TEMP1/MOSI pin, and using the resistor’s
temperature/resistance correlation, the firmware
monitors temperature of the NTC resistor. The internal
device timing functions associated with the TIO0 pin
provide calibration that correlates to system clock. A
49.9kΩ resistor connects to the TEMPREF/SCK pin and is
used as a constant non-temperature-dependent
reference for this algorithm.
The firmware algorithm is internal to the D2-45057,
D2-45157 device. Status from this temperature monitor
is used for the temperature protection functions of the
device and its application. There are no adjustments or
parameters for changing settings.
FIGURE 16. TEMPERATURE MONITOR CIRCUIT
100k
49.9k
10
0.1F
TEMP1/MOSI
TEMPREF/SCK
TEMPCOM/TIO0
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