參數(shù)資料
型號: CYU01M16SCG
廠商: Cypress Semiconductor Corp.
英文描述: 16-Mbit (1M x 16) Pseudo Static RAM
中文描述: 16兆位(1米× 16)偽靜態(tài)存儲器
文件頁數(shù): 6/11頁
文件大?。?/td> 502K
代理商: CYU01M16SCG
PRELIMINARY
CYU01M16SCG
MoBL3
Document #: 001-09739 Rev. **
Page 6 of 11
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)
[17, 18]
Read Cycle 2 (OE Controlled)
[16, 18, 19]
Notes:
16.Whenever CE
= HIGH or CE
= LOW, BHE/BLE are taken inactive, they must remain inactive for a minimum of 5 ns.
17.Device is continuously selected. OE = CE
1
= V
IL
and CE
2
= V
IH
.
18.WE is HIGH for Read Cycle.
19.CE is the Logical AND of CE
1
and CE
2
.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
HIGH IMPEDANCE
t
HZOE
HIGH
OE
CE
1
I
CC
I
SB
IMPEDANCE
ADDRESS
VCC
SUPPLY
CURRENT
t
HZBE
BHE
/
BLE
t
LZBE
t
HZCE
DATA OUT
t
DBE
t
CD
CE
2
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