參數(shù)資料
型號(hào): CYU01M16SCG
廠商: Cypress Semiconductor Corp.
英文描述: 16-Mbit (1M x 16) Pseudo Static RAM
中文描述: 16兆位(1米× 16)偽靜態(tài)存儲(chǔ)器
文件頁數(shù): 3/11頁
文件大?。?/td> 502K
代理商: CYU01M16SCG
PRELIMINARY
CYU01M16SCG
MoBL3
Document #: 001-09739 Rev. **
Page 3 of 11
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to
Ground Potential..............................–0.3V to V
CCMAX
+ 0.3V
DC Voltage Applied to Outputs
in High Z State
[5, 6, 7]
........................–0.3V to V
CCMAX
+ 0.3V
DC Input Voltage
[5, 6, 7]
....................–0.3V to V
CCMAX
+ 0.3V
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current....................................................> 200 mA
Device
Range
Industrial
Operating
Temperature (T
A
)
–40°C to +85°C
V
CC
2.2V to
3.6V
CYU01M16SCG
DC Electrical Characteristics
(Over the Operating Range)
[5, 6, 7]
Parameter
V
CC
V
OH
Description
Supply Voltage
Output HIGH Voltage I
OH
= –0.1 mA
Test Conditions
CYU01M16SCG-70 ns
Min.
Typ.
[4]
2.2
3.0
V
CC
– 0.2
Unit
V
V
Max.
3.6
V
CC
= 2.2V to 3.6V
V
OL
Output LOW Voltage I
OL
= 0.1 mA
V
CC
= 2.2V to 3.6V
V
CC
= 2.2V to 3.6V
V
CC
= 2.2V to 3.6V
GND < V
IN
< V
CC
0.2
V
V
IH
V
IL
I
IX
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Current
Output Leakage
Current
V
CC
Operating
Supply
Current
0.8 * V
CC
–0.3
–1
V
CC
+ 0.3V
0.2 * V
CC
+1
V
V
μ
A
I
OZ
GND < V
OUT
< V
CC
–1
+1
μ
A
I
CC
f = f
MAX
= 1/t
RC
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
18
25
mA
f = 1MHz
CE
1
> V
CC
– 0.2V, CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V, f = f
MAX
(Address and Data Only), f = 0
(OE, WE, BHE and BLE), V
CC
= 3.60V
CE
1
> V
CC
– 0.2V, CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or
V
IN
< 0.2V,
f = 0, V
CC
=V
CCMAX
3
55
5
mA
μ
A
I
SB1
Automatic CE
Power-Down
Current—CMOS
Inputs
Automatic CE
Power-Down
Current—CMOS
Inputs
70
I
SB2
55
70
μ
A
Capacitance
[8]
Parameter
Description
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
Max.
8
8
Unit
pF
pF
C
IN
C
OUT
Thermal Resistance
[8]
Input Capacitance
Output Capacitance
Parameter
Θ
JA
Θ
JC
Description
Test Conditions
VFBGA
56
11
Unit
°
C/W
°
C/W
Thermal Resistance (Junction to Ambient) Test conditions follow standard test methods
and procedures for measuring thermal
impedence, per EIA/JESD51
Thermal Resistance (Junction to Case)
Notes:
5. V
IL(MIN)
= –0.5V for pulse durations less than 20 ns.
6. V
= V
+ 0.5V for pulse durations less than 20 ns.
7. Overshoot and undershoot specifications are characterized and are not 100% tested.
8. Tested initially and after any design or process changes that may affect these parameters.
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