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參數(shù)資料
| 型號： | CYP15G0402DX |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Quad HOTLinkII SERDES |
| 中文描述： | 四HOTLinkII的SERDES |
| 文件頁數(shù)： | 2/27頁 |
| 文件大?。?/td> | 852K |
| 代理商： | CYP15G0402DX |
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CYP15G0402DX
PRELIMINARY
Document #: 38-02023 Rev. *B
Page 2 of 27
The transmit section of the CYP15G0402DX Quad HOTLinkII
SERDES consists of four byte wide channels that accept a
pre-encoded character on every clock cycle. Transmission
characters are passed from the Transmit Input Register to a
Serializer. The serialized characters are output from a differ-
ential transmission line driver at a bit-rate of 10 or 20 times the
input reference clock.
The receive section of the CYP15G0402DX Quad HOTLink II
SERDES consists of four byte wide channels. Each channel
accepts a serial bit-stream from a PECL-compatible differ-
ential line receiver and, using a completely integrated PLL
Clock Synchronizer, recovers the timing information
necessary for data reconstruction. Each recovered bit-stream
is deserialized and framed into characters. Recovered
characters are then passed to the receiver output register,
along with a recovered character clock.
The LVTTL parallel input interface use different clocking
sources to provide flexibility in system architecture. The
receive output interface may be configured to output the data
with a character-rate or half character-rate clock. Both true and
complement recovered-clock outputs are available.
Each transmit and receive channel contains independent
Built-In Self-Test (BIST) pattern generators and checkers. This
BIST hardware allows at-speed testing of the interface data
path.
HOTLink II devices are ideal for a variety of applications to
replace parallel interfaces with high-speed, point-to-point
serial links.Some applications include interconnecting
backplanes on switches, routers, servers and video trans-
mission systems
Transceiver Logic Block Diagram
x10
Serializer
Phase
Align
Buffer
x10
Framer
Deserializer
TX
RX
x10
Serializer
x10
Framer
Deserializer
TX
RX
x10
Serializer
x10
Framer
Deserializer
TX
RX
x10
Serializer
x10
Framer
Deserializer
TX
RX
T
R
T
R
T
R
T
R
O
A
±
I
±
O
±
I
±
O
±
I
±
O
±
I
±
Phase
Align
Buffer
Phase
Align
Buffer
Phase
Align
Buffer
相關PDF資料 |
PDF描述 |
|---|---|
| CYP15G0402DX-BGI | Quad HOTLinkII SERDES |
| CYP15G0402DXB | Quad HOTLink II SERDES(四HOTLink II并行轉換器) |
| CYV15G0402DXB | Quad HOTLink II SERDES(四HOTLink II并行轉換器) |
| CYP15G0403DXB | Independent Clock Quad HOTLink II Transceiver(獨立時鐘，四熱連接II收發(fā)器) |
| CYV15G0403DXB | Independent Clock Quad HOTLink II Transceiver(獨立時鐘，四熱連接II收發(fā)器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CYP15G0402DXB | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II⑩ SERDES |
| CYP15G0402DXB-BGC | 功能描述:電信線路管理 IC Quad Channel SERDES COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYP15G0402DXB-BGI | 制造商:Cypress Semiconductor 功能描述: |
| CYP15G0402DXB-BGXC | 功能描述:電信線路管理 IC Quad Ch HOTLink II GbE 1XFC SERDES RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYP15G0402DXB-BGXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II⑩ SERDES |
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