- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379099 > CYM1836V33 (Cypress Semiconductor Corp.) 128K x 32 3.3V Static RAM Module(128K x 32 3.3V 靜態(tài)RAM模塊) PDF資料下載
參數(shù)資料
| 型號： | CYM1836V33 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 128K x 32 3.3V Static RAM Module(128K x 32 3.3V 靜態(tài)RAM模塊) |
| 中文描述： | 128K的× 32 3.3靜態(tài)存儲器模塊（128K的× 32 3.3靜態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 260K |
| 代理商： | CYM1836V33 |
PRELIMINARY
128K x 32 3.3V Static RAM Module
fax id: 2046
CYM1836V33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
April 29, 1998
3
Features
High-density 3.3V 4-megabit SRAM module
32-bit standard footprint supports densities from 16K
x 32 through 1M x 32
High-speed CMOS SRAMs
Access time of 25 ns
—Low active power 1.6W (max.) at 20 ns
2.0V Data Retention (I
CCDRL
= 0.8 mA, max.)
SMD technology
TTL-compatible inputs and outputs
Available in 64-pin SIMM, 64-pin ZIP format or 72-pin
SIMM format.
Functional Description
The CYM1836V33 is a 3.3V high-performance 4-megabit stat-
ic RAM module organized as 128K words by 32 bits. This mod-
ule is constructed from four 128K x 8 SRAMs in SOJ packages
mounted on an epoxy laminate board with pins. Four chip se-
lects (CS
1
, CS
2
, CS
3
, CS
4
) are used to independently enable
the four bytes. Reading or writing can be executed on individ-
ual bytes or any combination of multiple bytes through proper
use of selects.
Writing to each byte is accomplished when the appropriate
chip select (CS) and write enable (WE) inputs are both LOW.
Data on the input/output pins (I/O) is written into the mem-
ory location specified on the address pins (A
0
through A
16
).
Reading the device is accomplished by taking the chip select
(CS) LOW while write enable (WE) remains HIGH. Under
these conditions, the contents of the memory location
specified on the address pins will appear on the data in-
put/output pins (I/O).
The data input/output pins stay at the high-impedance state
when write enable is LOW or the appropriate chip selects are
HIGH.
Two pins (PD
0
and PD
1
) are used to identify module mem-
ory density in applications where alternate versions of the
JEDEC-standard modules can be interchanged.
Logic Block Diagram
Pin Configurations
1836V33–1
A
0
A
16
OE
WE
CS
3
I/O
0
I/O
7
64-pin ZIP/SIMM
Top View
CS
1
CS
2
CS
4
I/O
8
I/O
15
I/O
16
I/O
23
I/O
24
I/O
31
17
128K x 8
SRAM
4
SRAM
4
SRAM
4
SRAM
4
PD
0
OPEN
PD
1
OPEN
128K x 8
128K x 8
128K x 8
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
A
7
A
8
A
9
I/O
4
I/O
5
I/O
6
I/O
7
A
14
CS
1
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
14
I/O
15
GND
A
15
CS
2
CS
4
NC
OE
I/O
24
I/O
25
I/O
26
I/O
27
A
3
A
4
A
5
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
CS
3
A
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
GND
1836V33–2
NC
PD
3
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
7
A
8
A
9
I/O
4
I/O
5
A
4
A
5
PD
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
6
I/O
7
WE
A
14
CS
1
GND
A
15
CS
2
NC
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
CS
3
A
16
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
23
GND
NC
I/O
14
I/O
15
CS
4
NC
OE
I/O
24
I/O
25
I/O
26
I/O
27
A
3
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
A
18
NC
NC
PD
0
-
PD
1
- OPEN
PD
2
-
PD
3
-
GND
OPEN
72-pin SIMM
Top View
OPEN
1836V33–3
相關PDF資料 |
PDF描述 |
|---|---|
| CYM1838 | 128K x 32 Static RAM Module(128K x 32 靜態(tài)RAM模塊) |
| CYM1840 | 256K x 32 Static RAM Module(256K x 32 靜態(tài)RAM模塊) |
| CYM1841A | 256K x 32 Static RAM Module(256K x 32 靜態(tài)RAM模塊) |
| CYM1841C | 256K x 32 Static RAM Module(256K x 32 靜態(tài)RAM模塊) |
| CYM1841V33 | 256K x 32 3.3V Static RAM Module(256K x 32 位3.3V 靜態(tài)RAM模塊) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CYM1838LHG-25C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| CYM1838LHG-25MB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| CYM1838LHG-30C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| CYM1838LHG-30MB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
| CYM1838LHG-35C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SRAM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復。