參數(shù)資料
型號: CY7C63231A
廠商: Cypress Semiconductor Corp.
英文描述: enCoRe USB Low-speed USB Peripheral Controller(enCoRe USB 低速USB外設(shè)控制器)
中文描述: 的enCoRe USB低速USB外設(shè)控制器(的enCoRe的USB低速的USB外設(shè)控制器)
文件頁數(shù): 18/50頁
文件大?。?/td> 1036K
代理商: CY7C63231A
FOR
FOR
enCoRe
USB
CY7C63221/31A
Document #: 38-08028 Rev. *B
Page 18 of 50
Internal Clock saves the external oscillator start-up time and keeps that oscillator off for additional power savings. The external
oscillator mode can be activated when desired, similar to operation at power-up.
The sequence of events for these modes is as follows:
Wake in Internal Clock Mode:
1. Before entering suspend, clear bit 0 of the Clock Configuration Register. This selects Internal clock mode after suspend.
2. Enter suspend mode by setting the suspend bit of the Processor Status and Control Register.
3. After a wake-up event, the internal clock starts immediately (within 2
μ
s).
4. A time-out period of 8
μ
s passes, and then firmware execution begins.
5. At some later point, to activate External Clock mode, set bit 0 of the Clock Configuration Register. This halts the internal clocks
while the external clock becomes stable. After an additional time-out (128
μ
s or 4 ms, see Section 9.0), firmware execution
resumes.
Wake in External Clock Mode:
1. Before entering suspend, the external clock must be selected by setting bit 0 of the Clock Configuration Register. Make sure
this bit is still set when suspend mode is entered. This selects External clock mode after suspend.
2. Enter suspend mode by setting the suspend bit of the Processor Status and Control Register.
3. After a wake-up event, the external oscillator is started. The clock is monitored for stability (this takes approximately 50–100
μ
s with a ceramic resonator).
4. After an additional time-out period (128
μ
s or 4 ms, see Section 9.0), firmware execution resumes.
11.2
The wake-up timer runs whenever the wake-up interrupt is enabled, and is turned off whenever that interrupt is disabled.
Operation is independent of whether the device is in suspend mode or if the global interrupt bit is enabled. Only the Wake-up
Timer Interrupt Enable bit (
Figure 19-1
) controls the wake-up timer.
Once this timer is activated, it will give interrupts after its time-out period (see below). These interrupts continue periodically until
the interrupt is disabled. Whenever the interrupt is disabled, the wake-up timer is reset, so that a subsequent enable always
results in a full wake-up time.
The wake-up timer can be adjusted by the user through the Wake-up Timer Adjust bits in the Clock Configuration Register
(
Figure 9-2
). These bits clear on reset. In addition to allowing the user to select a range for the wake-up time, a firmware algorithm
can be used to tune out initial process and operating condition variations in this wake-up time. This can be done by timing the
wake-up interrupt time with the accurate 1.024-ms timer interrupt, and adjusting the Timer Adjust bits accordingly to approximate
the desired wake-up time.
Table 11-1. Wake-up Timer Adjust Settings
Wake-up Timer
Adjust Bits [2:0]
(Bits [6:4] in
Figure 9-2
)
Wake-up Time
000 (reset state)
1 * t
WAKE
2 * t
WAKE
4 * t
WAKE
8 * t
WAKE
16 * t
WAKE
32 * t
WAKE
64 * t
WAKE
128 * t
WAKE
001
010
011
100
101
110
111
See Section 24.0 for the value of t
WAKE
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