參數(shù)資料
型號: CY7C454
廠商: Cypress Semiconductor Corp.
英文描述: 4Kx9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的4Kx9可級聯(lián)定時的先進先出)
中文描述: 4Kx9級聯(lián)與時鐘FIFO的可編程標志(帶可編程標記的4Kx9可級聯(lián)定時的先進先出)
文件頁數(shù): 11/23頁
文件大?。?/td> 437K
代理商: CY7C454
CY7C451
CY7C453
CY7C454
11
PRELIMINARY
Notes:
29. CKW is clock and CKR is opposite clock.
30. Count = 2,049 indicates Half Full for the CY7C454, count=1,025 indicates Half Full for the CY7C453, and count = 257 indicates Half Full for the CY7C451.
Values for CY7C451 count are shown in brackets.
31. When the FIFO contains 2048[1024,256] words, the rising edge of the next enabled write causes the HF to be true (LOW).
32. The HF write flag update cycle does not affect the count because ENW is HIGH. It only updates HF to HIGH.
33. When making the transition from Half Full to Less Than Half Full, the count must decrease by two (1,025
=>
1,023; two enabled reads: R2 and R3) before
a write (W4) can update flags to less than Half Full.
Switching Waveforms
(continued)
Write to Half Full Timing Diagram with Free-Running Clocks
COUNT
1024
1025
1023
1025
t
SKEW1
t
SKEW2
t
FD
t
FD
t
FD
EWRITE
EWRITE
EWRITE
EWRITE
EREAD
EREAD
1024
1024
1026
C451-15
Write to Half Full Timing Diagram with Write Flag Update Cycle with Free-Running Clocks
COUNT [256]
1025
1023
1025
t
SKEW1
t
SKEW2
t
FD
t
FD
t
FD
EW1
WRITE
EW5
EW6
1024
1024
1026
EW7
ERR2
EREAD
FLAG UPDATE CYCLE
CKW
CKR
ENW
ENR
HF
E/F
PAFE
C451-16
CKW
CKR
ENW
ENR
HF
PAFE
E/F
HIGH
HIGH
HIGH
HIGH
W1
W2
W3
W4
W5
W6
R1
R4
R5
R6
R3
R2
W2
W3
W4
R1
R4
R5
R6
R3
R7
[255]
[21,29,30,31]
[21,29,30,31,32,33]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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