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參數(shù)資料
| 型號(hào)： | CY7C451 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 512x9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標(biāo)記的512x9可級(jí)聯(lián)定時(shí)的先進(jìn)先出) |
| 中文描述： | 512x9級(jí)聯(lián)與時(shí)鐘FIFO的可編程標(biāo)志（帶可編程標(biāo)記的512x9可級(jí)聯(lián)定時(shí)的先進(jìn)先出） |
| 文件頁數(shù)： | 2/23頁 |
| 文件大?。?/td> | 437K |
| 代理商： | CY7C451 |
CY7C451
CY7C453
CY7C454
2
PRELIMINARY
Functional Description
(continued)
The CY7C451, CY7C453, and CY7C454 provide three status pins
to the user. These pins are decoded to determine one of six states:
Empty, Almost Empty, Less than or Equal to Half Full, Greater than
Half Full, Almost Full, and Full (see Table 1). The Almost Empty/Full
flag (PAFE) and XO functions share the same pin. The Almost Emp-
ty/Full flag is valid in the standalone and width expansion con-
figurations. In the depth expansion, this pin provides the
expansion out (XO) information that is used to signal the
next FIFO when it will be activated.
The flags are synchronous, i.e., they change state relative to
either the read clock (CKR) or the write clock (CKW). When
entering or exiting the Empty and Almost Empty states, the
flags are updated exclusively by the CKR. The flags denoting
Half Full, Almost Full, and Full states are updated exclusively
by CKW. The synchronous flag architecture guarantees that
the flags maintain their status for some minimum time.
The CY7C451, CY7C453, and the CY7C454 use center power
and ground for reduced noise. Both configurations are fabri-
cated using an advanced RAM 2.8 technology. Input ESD
protection is greater than 2001V, and latch-up is prevented
by the use of reliable layout techniques and guard rings.
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
....................................
65
°
C to +150
°
C
Ambient Temperature with
Power Applied
.................................................
55
°
C to +125
°
C
Supply Voltage to Ground Potential
.................
0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
.....................................................
0.5V to +7.0V
DC Input Voltage
.................................................
3.0V to +7.0V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage ...........................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current....................................................> 200 mA
Selection Guide
7C451-12
7C453-12
7C454-12
83.3
83.3
9
12
5
5
4
0
9
140
150
7C451-14
7C453-14
7C454-14
71.4
71.4
10
14
6.5
6.5
5
0
10
140
150
7C451-20
7C453-20
7C454-20
50
50
15
20
9
9
6
0
15
120
130
7C451-30
7C453-30
7C454-30
33.3
33.3
20
30
12
12
7
0
20
100
110
Maximum Frequency (MHz)
Maximum Cascadable Frequency
Maximum Access Time (ns)
Minimum Cycle Time (ns)
Minimum Clock HIGH Time (ns)
Minimum Clock LOW Time (ns)
Minimum Data or Enable Set-Up (ns)
Minimum Data or Enable Hold (ns)
Maximum Flag Delay (ns)
Maximum Current (mA)
Commercial
Military/Industrial
Selection Guide
(continued)
CY7C451
CY7C453
CY7C454
Density
512 x 9
2,048 x 9
4,096 x 9
OE, Depth Cascadable
Yes
Yes
Yes
Package
32-Pin PLCC
32-Pin PLCC
32-Pin PLCC
Operating Range
Range
Ambient
Temperature
0
°
C to +70
°
C
40
°
C to +85
°
C
V
CC
Commercial
Industrial
5V
±
10%
5V
±
10%
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C454 | 4Kx9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標(biāo)記的4Kx9可級(jí)聯(lián)定時(shí)的先進(jìn)先出) |
| CY7C466A | Asynchronous, Cascadable 64K x9 FIFOs(異步，可級(jí)聯(lián)的 64K x9 先進(jìn)先出) |
| CY7C460A | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C460A-10JC | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
| CY7C460A-10JI | Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C451-14JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 512 x 9 32-Pin PLCC |
| CY7C451-30LMB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C453 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C453-14JI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C453-20JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 9 32-Pin PLCC 制造商:Cypress Semiconductor 功能描述:FIFO, 2K x 9, Synchronous, 32 Pin, Plastic, PLCC |
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