參數(shù)資料
型號: CY7C43633
廠商: Cypress Semiconductor Corp.
英文描述: 512 x36 Unidirectional Synchronous FIFO w/ Bus Matching(512 x36 單向同步先進(jìn)先出帶總線匹配)
中文描述: 512 x36單向同步FIFO瓦特/總線匹配(512 x36單向同步先進(jìn)先出帶總線匹配)
文件頁數(shù): 18/28頁
文件大?。?/td> 422K
代理商: CY7C43633
CY7C43623
CY7C43633/CY7C43643
CY7C43663
/
CY7C43683
18
PRELIMINARY
Note:
33. If Port B is configured for word size, data can be written to the Mail1 register using A
(A
are
don
t care
inputs). In this first case B
0
will have
valid data (B
will be indeterminate). If Port B is configured for byte size, data can be written to the Mail1 Register using A
0
8
(A
9
35
are
don
t care
inputs). In this second case, B
0
8
will have valid data (B
9
35
will be indeterminate).
Switching Waveforms
(continued)
t
ENH
t
ENS
t
ENH
t
ENS
t
ENH
t
ENS
t
ENH
t
ENS
t
DH
t
DS
W1
t
PMF
t
PMF
t
EN
t
MDV
t
PMR
t
ENS
t
ENH
t
DIS
FIFO Output Register
W1 (Remains valid in Mail1 Register after read)
CLKA
CSA
W/RA
MBA
ENA
A
0
35
CLKB
MBF1
CSB
W/RB
MBB
ENB
Timing for Mail1 Register and MBF1 Flag (CY Standard and FWFT Modes)
[33]
B
0
35
相關(guān)PDF資料
PDF描述
CY7C43623 256 x36 Unidirectional Synchronous FIFO w/ Bus Matching(256 x36 單向同步先進(jìn)先出帶總線匹配)
CY7C43643 1K x36 Unidirectional Synchronous FIFO w/ Bus Matching(1K x36 單向同步先進(jìn)先出帶總線匹配)
CY7C43663 4K x36 Unidirectional Synchronous FIFO w/ Bus Matching(4K x36 單向同步先進(jìn)先出帶總線匹配)
CY7C43683 16K x36 Unidirectional Synchronous FIFO w/ Bus Matching(16K x36 單向同步先進(jìn)先出帶總線匹配)
CY7C43634 512 x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(512 x36 x2 雙向同步先進(jìn)先出 帶總線匹配)
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