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參數(shù)資料
| 型號： | CY7C1992BV18 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 18-Mbit DDR-II SIO SRAM 2-Word(2字Burst結(jié)構(gòu),18-Mbit DDR-II SIO SRAM) |
| 中文描述： | 18兆位的DDR - II二氧化硅的SRAM 2字（2字突發(fā)結(jié)構(gòu),18 -兆位的DDR - II二氧化硅的SRAM） |
| 文件頁數(shù)： | 15/25頁 |
| 文件大小： | 1031K |
| 代理商： | CY7C1992BV18 |
CY7C1392BV18
CY7C1992BV18
CY7C1393BV18
CY7C1394BV18
Document Number: 38-05623 Rev. *B
Page 15 of 25
Hold Times
t
TMSH
t
TDIH
t
CH
Output Times
t
TDOV
t
TDOX
TMS Hold after TCK Clock Rise
TDI Hold after Clock Rise
Capture Hold after Clock Rise
10
10
10
ns
ns
ns
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
20
ns
ns
0
TAP Timing and Test Conditions
[12]
TAP AC Switching Characteristics
Over the Operating Range (continued)
[11, 12]
Parameter
Description
Min.
Max.
Unit
(a)
TDO
C
L
= 20 pF
Z
0
= 50
GND
0.9V
50
1.8V
0V
ALL INPUT PULSES
0.9V
Test Clock
TCK
Test Mode Select
TMS
Test Data-In
TDI
Test Data-Out
TDO
t
TCYC
t
TMSH
t
TL
t
TH
t
TMSS
t
TDIS
t
TDIH
t
TDOV
t
TDOX
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