- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379077 > CY7C1471V33 (Cypress Semiconductor Corp.) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結構的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) PDF資料下載
參數(shù)資料
| 型號： | CY7C1471V33 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結構的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| 中文描述： | 72兆位（2米x 36/4M x 18/1M × 72）流體系結構，通過與總線延遲（帶總線延遲結構的72兆位通過的SRAM（2米x 36/4M x 18/1M × 72）流的SRAM） |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 1138K |
| 代理商： | CY7C1471V33 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
CY7C1471V33
CY7C1473V33
CY7C1475V33
Document #: 38-05288 Rev. *J
Page 21 of 32
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature .................................–65
°
C to +150
°
C
Ambient Temperature with
Power Applied.............................................–55
°
C to +125
°
C
Supply Voltage on V
DD
Relative to GND........–0.5V to +4.6V
Supply Voltage on V
DDQ
Relative to GND ......–0.5V to +V
DD
DC Voltage Applied to Outputs
in Tri-State........................................... –0.5V to V
DDQ
+ 0.5V
Electrical Characteristics
Over the Operating Range
[14, 15]
DC Input Voltage ...................................–0.5V to V
DD
+ 0.5V
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage........................................... >2001V
(MIL-STD-883, Method 3015)
Latch Up Current.................................................... >200 mA
Operating Range
Range
Ambient
Temperature
0°C to +70°C 3.3V
–5%/+10%
–40°C to +85°C
V
DD
V
DDQ
Commercial
Industrial
2.5V – 5%
to
V
DD
Parameter
V
DD
V
DDQ
Description
Power Supply Voltage
IO Supply Voltage
Test Conditions
Min
3.135
3.135
2.375
2.4
2.0
Max
3.6
V
DD
2.625
Unit
V
V
V
V
V
V
V
V
V
V
V
μ
A
For 3.3V IO
For 2.5V IO
For 3.3V IO, I
OH
= –4.0 mA
For 2.5V IO, I
OH
= –1.0 mA
For 3.3V IO, I
OL
= 8.0 mA
For 2.5V IO, I
OL
= 1.0 mA
For 3.3V IO
For 2.5V IO
For 3.3V IO
For 2.5V IO
GND
≤
V
I
≤
V
DDQ
V
OH
Output HIGH Voltage
V
OL
Output LOW Voltage
0.4
0.4
V
IH
Input HIGH Voltage
[14]
2.0
1.7
–0.3
–0.3
–5
V
DD
+ 0.3V
V
DD
+ 0.3V
0.8
0.7
5
V
IL
Input LOW Voltage
[14]
I
X
Input Leakage Current
except ZZ and MODE
Input Current of MODE Input = V
SS
–30
μ
A
μ
A
μ
A
μ
A
μ
A
mA
mA
mA
mA
Input = V
DD
Input = V
SS
Input = V
DD
5
Input Current of ZZ
–5
30
5
305
275
200
200
I
OZ
I
DD
Output Leakage Current GND
≤
V
I
≤
V
DD,
Output Disabled
V
DD
Operating Supply
Current
f = f
MAX
= 1/t
CYC
–5
V
DD
= Max., I
OUT
= 0 mA,
7.5 ns cycle, 133 MHz
10 ns cycle, 117 MHz
7.5 ns cycle, 133 MHz
10 ns cycle, 117 MHz
I
SB1
Automatic CE
Power Down
Current—TTL Inputs
Automatic CE
Power Down
Current—CMOS Inputs
Automatic CE
Power Down
Current—CMOS Inputs
Automatic CE
Power Down
Current—TTL Inputs
V
DD
= Max, Device Deselected,
V
IN
≥
V
IH
or V
IN
≤
V
IL
f = f
MAX
, inputs switching
V
DD
= Max, Device Deselected,
V
IN
≤
0.3V or V
IN
> V
DD
– 0.3V,
f = 0, inputs static
V
DD
= Max, Device Deselected, or
V
IN
≤
0.3V or V
IN
> V
DDQ
– 0.3V
f = f
MAX
, inputs switching
V
DD
= Max, Device Deselected,
V
IN
≥
V
DD
– 0.3V or V
IN
≤
0.3V
,
f = 0, inputs static
I
SB2
All speeds
120
mA
I
SB3
7.5 ns cycle, 133 MHz
10 ns cycle, 117 MHz
200
200
mA
mA
I
SB4
All Speeds
165
mA
Notes
14.Overshoot: V
(AC) < V
+1.5V (pulse width less than t
/2). Undershoot: V
(AC) > –2V (pulse width less than t
CYC
/2).
15.T
Power-up
: assumes a linear ramp from 0V to V
DD
(min.) within 200 ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
.
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C1482V25-200BZXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-200BZC | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-200BZI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-200BZXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
| CY7C1480V25-200BZXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1471V33-100AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 72MBIT 2MX36 8.5NS 100TQFP - Bulk |
| CY7C1471V33-100AXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1471V33-117AXC | 功能描述:靜態(tài)隨機存取存儲器 2Mx36 3.3V NoBL FT 靜態(tài)隨機存取存儲器 COM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1471V33-117AXCES | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 72MBIT 2MX36 8.5NS 100TQFP - Bulk |
| CY7C1471V33-133AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 72MBIT 2MX36 6.5NS 100TQFP - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。