參數(shù)資料
型號(hào)： CY7C1355C-117BGC
廠(chǎng)商： Cypress Semiconductor Corp.
英文描述： 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
中文描述： 9兆位（256 × 36/512K × 18）流體系結(jié)構(gòu)，通過(guò)與總線(xiàn)延遲靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù)： 1/32頁(yè)
文件大?。?/td> 496K
代理商： CY7C1355C-117BGC
PRELIMINARY
9-Mbit (256K x 36/512K x 18) Flow-Through
SRAM with NoBL Architecture
CY7C1355C
CY7C1357C
Cypress Semiconductor Corporation
Document #: 38-05539 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised April 12, 2004
Features
No Bus Latency (NoBL) architecture eliminates
dead cycles between write and read cycles.
Can support up to 133-MHz bus operations with zero
wait states
— Data is transferred on every clock
Pin compatible and functionally equivalent to ZBT
devices
Internally self-timed output buffer control to eliminate
the need to use OE
Registered inputs for flow-through operation
Byte Write capability
3.3V/2.5V I/O power supply
Fast clock-to-output times
— 6.5 ns (for 133-MHz device)
— 7.0 ns (for 117-MHz device)
— 7.5 ns (for 100-MHz device)
Clock Enable (CEN) pin to enable clock and suspend
operation
Synchronous self-timed writes
Asynchronous Output Enable
Offered in JEDEC-standard 100 TQFP, 119-Ball BGA and
165-Ball fBGA packages
Three chip enables for simple depth expansion.
Automatic Power-down feature available using ZZ
mode or CE deselect
JTAG boundary scan for BGA and fBGA packages
Burst Capability—linear or interleaved burst order
Low standby power
Functional Description
[1]
The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/ 512K x 18
Synchronous Flow-through Burst SRAM designed specifically
to support unlimited true back-to-back Read/Write operations
without
the
insertion
CY7C1355C/CY7C1357C is equipped with the advanced No
Bus Latency (NoBL) logic required to enable consecutive
Read/Write operations with data being transferred on every
clock cycle. This feature dramatically improves the throughput
of data through the SRAM, especially in systems that require
frequent Write-Read transitions.
All synchronous inputs pass through input registers controlled
by the rising edge of the clock. The clock input is qualified by
the Clock Enable (CEN) signal, which when deasserted
suspends operation and extends the previous clock cycle.
Maximum access delay from the clock rise is 6.5 ns (133-MHz
device).
Write operations are controlled by the two or four Byte Write
Select (BW
X
) and a Write Enable (WE) input. All writes are
conducted with on-chip synchronous self-timed write circuitry.
Three synchronous Chip Enables (CE
1
, CE
2
, CE
3
) and an
asynchronous Output Enable (OE) provide for easy bank
selection and output three-state control. In order to avoid bus
contention, the output drivers are synchronously three-stated
during the data portion of a write sequence.
of
wait
states.
The
Selection Guide
133 MHz
6.5
250
30
117 MHz
7.0
220
30
100 MHz
7.5
180
30
Unit
ns
mA
mA
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Note:
1. For best-practices recommendations, please refer to the Cypress application note
System Design Guidelines
on www.cypress.com.
相關(guān)PDF資料
PDF描述
CY7C1355C-117BGI 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
CY7C1355C-117BZC 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
CY7C1355C-117BZI 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
CY7C1355C-133AC 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
CY7C1355C-133AI 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1355C-133AXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 3.3V NoBL Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪(fǎng)問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1355C-133AXCKJ 制造商:Cypress Semiconductor 功能描述:
CY7C1355C-133AXCT 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 3.3V NoBL Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器 COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪(fǎng)問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1355C-133AXI 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY7C1355C-133AXIT 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
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