- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379052 > CY7C0837AV (Cypress Semiconductor Corp.) FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM(FLEx18 3.3V 64K/128K x 36和128K/256K x 18同步雙端口RAM) PDF資料下載
參數(shù)資料
| 型號： | CY7C0837AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM(FLEx18 3.3V 64K/128K x 36和128K/256K x 18同步雙端口RAM) |
| 中文描述： | FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙口RAM（FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙端口RAM）的 |
| 文件頁數(shù)： | 24/28頁 |
| 文件大?。?/td> | 775K |
| 代理商： | CY7C0837AV |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁
CY7C0837AV
CY7C0830AV/CY7C0831AV
CY7C0832AV/CY7C0833AV
Document #: 38-06059 Rev. *Q
Page 24 of 28
MailBox Interrupt Timing
[53, 54, 55, 56, 57]
Table 7. Read/Write and Enable Operation
(Any Port)
[1, 16, 58, 59, 60]
Inputs
Outputs
Operation
OE
X
CLK
CE
0
H
CE
1
X
R/W
X
DQ
0
–
DQ
17
High-Z
Deselected
X
X
L
X
High-Z
Deselected
X
L
H
L
D
IN
Write
L
L
H
H
D
OUT
Read
H
X
L
H
X
High-Z
Outputs Disabled
Notes:
53.CE
= OE = ADS = CNTEN = LOW; CE
= CNTRST = MRST = CNT/MSK = HIGH.
54.Address “7FFFF” is the mailbox location for R_Port of the 9Mb device.
55.L_Port is configured for Write operation, and R_Port is configured for Read operation.
56.At least one byte enable (BE0 – BE1) is required to be active during interrupt operations.
57.Interrupt flag is set with respect to the rising edge of the Write clock, and is reset with respect to the rising edge of the Read clock.
58.OE is an asynchronous input signal.
59.When CE changes state, deselection and Read happen after one cycle of latency.
60.CE
0
= OE = LOW; CE
1
= R/W = HIGH.
Switching Waveforms
(continued)
t
CH2
t
CL2
t
CYC2
CLK
L
t
CH2
t
CL2
t
CYC2
CLK
R
7FFFF
t
SA
t
HA
A
n+3
A
n
A
n+1
A
n+2
L_PORT
ADDRESS
A
m
A
m+4
A
m+1
7FFFF
A
m+3
R_PORT
ADDRESS
INT
R
t
SA
t
HA
t
SINT
t
RINT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C0851V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM(FLEx36TM 3.3V 32K/64K/128K/256K x 36同步雙端口RAM) |
| CY7C0852V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-133AC | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
| CY7C0850V-133AI | FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C0837AV-167BBC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 512K-Bit 32K x 18 4ns 144-Pin FBGA 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C0850AV-133AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C0850AV-133AI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C0850AV-133BBC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C0850AV-133BBI | 制造商:Cypress Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。