參數(shù)資料
型號: CY7C0837AV
廠商: Cypress Semiconductor Corp.
英文描述: FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM(FLEx18 3.3V 64K/128K x 36和128K/256K x 18同步雙端口RAM)
中文描述: FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙口RAM(FLEx18 3.3 64K/128K × 36和128K/256K × 18同步雙端口RAM)的
文件頁數(shù): 11/28頁
文件大?。?/td> 775K
代理商: CY7C0837AV
CY7C0837AV
CY7C0830AV/CY7C0831AV
CY7C0832AV/CY7C0833AV
Document #: 38-06059 Rev. *Q
Page 11 of 28
Table 4. Identification Register Definitions
Instruction Field
Revision Number (31:28)
Cypress Device ID
(27:12)
Value
Description
0h
C090h
C091h
C093h
C094h
034h
1
Reserved for version number.
Defines Cypress part number for CY7C0832AV
Defines Cypress part number for CY7C0831AV
Defines Cypress part number for CY7C0830AV
Defines Cypress part number for CY7C0837AV.
Allows unique identification of the DP family device vendor.
Indicates the presence of an ID register.
Cypress JEDEC ID (11:1)
ID Register Presence (0)
Table 5. Scan Registers Sizes
Register Name
Instruction
Bypass
Identification
Boundary Scan
Bit Size
4
1
32
n
[21]
Table 6. Instruction Identification Codes
Instruction
EXTEST
BYPASS
IDCODE
HIGHZ
CLAMP
SAMPLE/PRELOAD
NBSRST
RESERVED
Code
Description
0000
1111
1011
0111
0100
1000
1100
All other codes
Captures the Input/Output ring contents. Places the BSR between the TDI and TDO.
Places the BYR between TDI and TDO.
Loads the IDR with the vendor ID code and places the register between TDI and TDO.
Places BYR between TDI and TDO. Forces all device output drivers to a High-Z state.
Controls boundary to 1/0. Places BYR between TDI and TDO.
Captures the input/output ring contents. Places BSR between TDI and TDO.
Resets the non-boundary scan logic. Places BYR between TDI and TDO.
Other combinations are reserved. Do not use other than the above.
Notes:
21.See details in the device BSDL file.
D2
TDO
TDI
D1
TDO
TDI
TDI
TDO
Figure 3. Scan Chain for 9Mb Device
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