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參數(shù)資料
| 型號(hào)： | CY62148EV30 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4-Mbit (512K x 8) Static RAM |
| 中文描述： | 4兆位（為512k × 8）靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 919K |
| 代理商： | CY62148EV30 |
CY62148EV30 MoBL
Document #: 38-05576 Rev. *F
Page 5 of 12
Switching Characteristics
(Over the Operating Range)
[12]
Parameter
Description
45 ns
55 ns
[1]
Unit
Min
Max
Min
Max
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
Write Cycle
[15]
Read Cycle Time
45
55
ns
Address to Data Valid
45
55
ns
Data Hold from Address Change
10
10
ns
CE LOW to Data Valid
45
55
ns
OE LOW to Data Valid
OE LOW to Low Z
[13]
OE HIGH to High Z
[13, 14]
CE LOW to Low Z
[13]
CE HIGH to High Z
[13, 14]
22
25
ns
5
5
ns
18
20
ns
10
10
ns
18
20
ns
CE LOW to Power Up
0
0
ns
CE HIGH to Power Up
45
55
ns
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
Write Cycle Time
45
55
ns
CE LOW to Write End
35
40
ns
Address Setup to Write End
35
40
ns
Address Hold from Write End
0
0
ns
Address Setup to Write Start
0
0
ns
WE Pulse Width
35
40
ns
Data Setup to Write End
25
25
ns
Data Hold from Write End
WE LOW to High Z
[13, 14]
WE HIGH to Low Z
[13]
0
0
ns
18
20
ns
10
10
ns
Notes
12.Test Conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of V
CC(typ)
/2, input
pulse levels of 0 to V
, and output loading of the specified I
/I
OH
as shown in the
“AC Test Loads and Waveforms” on page 4
.
13.At any given temperature and voltage condition, t
is less than t
, t
is less than t
, and t
HZWE
is less than t
LZWE
for any given device.
14.t
, t
, and t
transitions are measured when the output enter a high impedance state.
15.The internal write time of the memory is defined by the overlap of WE, CE = V
. All signals must be ACTIVE to initiate a write and any of these signals can
terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
[+] Feedback
相關(guān)PDF資料 |
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| CY62148EV30LL | 4-Mbit (512K x 8) Static RAM |
| CY62148EV30LL-45BVXI | 4-Mbit (512K x 8) Static RAM |
| CY62148EV30LL-45ZSXI | 4-Mbit (512K x 8) Static RAM |
| CY62148EV30LL-55SXI | 4-Mbit (512K x 8) Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62148EV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8) Static RAM |
| CY62148EV30_12 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512 K ?? 8) Static RAM |
| CY62148EV30LL | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8) Static RAM |
| CY62148EV30LL-45BVI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M MoBL Ultra Lo PWR HI SPD MicroPWR RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62148EV30LL-45BVIT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M MoBL Ultra Lo PWR HI SPD MicroPWR RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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