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參數(shù)資料
| 型號： | CY2CC1910SIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 1:10 Clock Fanout Buffer with Output Enable |
| 中文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 0.300 INCH, SOIC-24 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 129K |
| 代理商： | CY2CC1910SIT |
COMLINK
SERIES
CY2CC1910
Document #: 38-07347 Rev. *B
Page 5 of 8
Parameter Measurement Information: V
DD
@
1.8V
From Output
Under Test
C
L
= 3 pF
500 ohm
Figure 4. Point to Point Load Circuit
[4,5,6]
0 V
Input
t
w(20-80)
0.8VDD
0 V
VDD/2
Input
t
w(50-50)
VDD/2
VDD/2
0.8VDD
Figure 5. Voltage Waveforms
–
Pulse Duration
[5]
From Output
Under Test
C
L
= 6 pF
500 ohm
Figure 6. Load Circuit
[4,5,6]
0.9V
t
PLH
t
PHL
1.8V
V
OH
V
OL
0 V
Input
Output
0.9V
0.9V
0.9V
Figure 7. Voltage Waveforms Propagation Delay Times
[7]
0 V
Input
t
w(20-80)
1.8V
0 V
0.9V
Input
t
w(50-50)
0.9V
0.9V
1.8V
Figure 8. Voltage Waveforms
–
Pulse Duration
[5]
INPUT
OUTPUT
t
PLH
t
PHL
tsk
(P)
=
l
t
PHL
- t
PLH
l
3V
1.5V
0V
VOH
1.5V
VOL
Figure 9. Pulse Skew - tsk
(p)
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