參數(shù)資料
型號(hào): CY28548ZXCT
廠商: Silicon Laboratories Inc
文件頁數(shù): 30/30頁
文件大小: 0K
描述: IC CLK CK505 960M/965M 64TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU 服務(wù)器
輸入: 時(shí)鐘
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 3:22
差分 - 輸入:輸出: 無/是
頻率 - 最大: 400MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TFSOP (0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 64-TSSOP
包裝: 帶卷 (TR)
CY28548
........................Document #: 001-08400 Rev ** Page 9 of 30
Table 3. Block Read and Block Write Protocol
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description
1Start
1
Start
8:2
Slave address–7 bits
8:2
Slave address–7 bits
9
Write
9
Write
10
Acknowledge from slave
10
Acknowledge from slave
18:11
Command Code–8 bits
18:11
Command Code–8 bits
19
Acknowledge from slave
19
Acknowledge from slave
27:20
Byte Count–8 bits
(Skip this step if I2C_EN bit set)
20
Repeat start
28
Acknowledge from slave
27:21
Slave address–7 bits
36:29
Data byte 1–8 bits
28
Read = 1
37
Acknowledge from slave
29
Acknowledge from slave
45:38
Data byte 2–8 bits
37:30
Byte Count from slave–8 bits
46
Acknowledge from slave
38
Acknowledge
....
Data Byte /Slave Acknowledges
46:39
Data byte 1 from slave–8 bits
....
Data Byte N–8 bits
47
Acknowledge
....
Acknowledge from slave
55:48
Data byte 2 from slave–8 bits
....
Stop
56
Acknowledge
....
Data bytes from slave / Acknowledge
....
Data Byte N from slave–8 bits
....
NOT Acknowledge
....
Stop
Table 4. Byte Read and Byte Write Protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1Start
8:2
Slave address–7 bits
8:2
Slave address–7 bits
9Write
10
Acknowledge from slave
10
Acknowledge from slave
18:11
Command Code–8 bits
18:11
Command Code–8 bits
19
Acknowledge from slave
19
Acknowledge from slave
27:20
Data byte–8 bits
20
Repeated start
28
Acknowledge from slave
27:21
Slave address–7 bits
29
Stop
28
Read
29
Acknowledge from slave
37:30
Data from slave–8 bits
38
NOT Acknowledge
39
Stop
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