參數(shù)資料
型號(hào)： CY28548ZXCT
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 25/30頁(yè)
文件大?。?/td> 0K
描述： IC CLK CK505 960M/965M 64TSSOP
標(biāo)準(zhǔn)包裝： 2,000
類型： 時(shí)鐘/頻率發(fā)生器
PLL： 是
主要目的： Intel CPU 服務(wù)器
輸入： 時(shí)鐘
輸出： LVCMOS
電路數(shù)： 1
比率 - 輸入:輸出： 3:22
差分 - 輸入:輸出： 無(wú)/是
頻率 - 最大： 400MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： 0°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-TFSOP （0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 64-TSSOP
包裝： 帶卷 (TR)
CY28548
........................Document #: 001-08400 Rev ** Page 4 of 30
25
SRCC1 /
LCDC_100/27M_SS
O, DIF,
SE
Complementary 100 MHz differential serial reference clock output/Comple-
mentary 100 MHz LCD video clock output /Spread 27 MHz video clock output.
Selected via GCLK_SEL at CKPWRGD assertion.
26
VSS_PLL3
GND
Ground for PLL3.
27
VDD_PLL3_IO
PWR
3.3V-1.25V power supply for outputs.
28
SRCT2 / SATAT
O, DIF True 100 MHz differential serial reference clock output.
29
SRCC2 / SATAC
O, DIF Complementary 100 MHz differential serial reference clock output.
30
VSS_SRC
GND
Ground for outputs.
31
SRCT3 / CR#_C
I/O,
DIF
True 100 MHz differential serial reference clock output /3.3V Clock Request
#_C/D input
Selected via CR#_C_EN/CR#_D_EN bit located in byte 5 bit 3and 1.
The CR#_C_SEL and CR#_D_SEL bits in byte 5 bit 2 and 0 will select which SRC
to stop when asserted
32
SRCC3 / CR#_D
I/O,
DIF
Complementary 100 MHz differential serial reference clock output/3.3V Clock
Request #_C/D input
Selected via CR#_C_EN/CR#_D_EN bit located in byte 5 bit 3and 1.
The CR#_C_SEL and CR#_D_SEL bits in byte 5 bit 2 and 0 will select which SRC
to stop when asserted
33
VDD_SRC_IO
PWR
3.3V-1.25V Power supply for outputs.
34
SRCT4
O, DIF True 100 MHz differential serial reference clocks.
35
SRCC4
O, DIF Complementary 100 MHz differential serial reference clocks.
36
VSS_SRC
GND
Ground for outputs.
37
SRCT9
O, DIF True 100 MHz differential serial reference clocks.
38
SRCC9
O, DIF Complementary 100 MHz differential serial reference clocks.
39
SRCC11/ CR#_G
I/O,
DIF
True 100 MHz differential serial reference clocks/3.3V CR#_G Input.
Selected via CR#_G_EN/CR#_H_EN bit located in byte 6 bit 5 and 4.
When selected, CR#_G controls SRC9, CR#_H controls SRC10
40
SRCT11/ CR#_H
I/O,
DIF
Complementary 100 MHz Differential serial reference clocks/3.3V CR#_H
Input.
Selected via CR#_G_EN/CR#_H_EN bit located in byte 6 bit 5 and 4.
When selected, CR#_G controls SRC9, CR#_H controls SRC10
41
SRCT10
O, DIF True 100 MHz Differential serial reference clocks.
42
SRCC10
O, DIF Complementary 100 MHz Differential serial reference clocks.
43
VDD_SRC_IO
PWR
3.3V-1.25V power supply for outputs.
44
CPU_STOP#
I
3.3V-tolerant input for stopping CPU outputs
During direct clock off to M1 mode transition, a serial load of BSEL data is driven
on CPU_STOP# and sampled on the rising edge of PCI_STOP#. See Figure 13
for more information.
45
PCI_STOP#
I
3.3V-tolerant input for stopping PCI and SRC outputs
During direct clock off to M1 mode transition, a serial load of BSEL data is driven
on CPU_STOP# and sampled on the rising edge of PCI_STOP#. See Figure 13
for more information.
46
VDD_SRC
PWR
3.3V power supply for SRC PLL.
47
SRCC6
O, DIF Complementary 100 MHz Differential serial reference clocks.
48
SRCT6
O, DIF True 100 MHz Differential serial reference clocks.
49
VSS_SRC
GND
Ground for outputs.
50
SRCC7/ CR#_E
I/O,
DIF
Complementary 100 MHz differential serial reference clocks/3.3V CR#_E
Input.
Selected via CR#_E_EN/CR#_F_EN bit located in byte 6 bit 7 and 6.
When selected, CR#_E controls SRC6, CR#_F controls SRC8
QFN Pin Definitions (continued)
Pin No.
Name
Type
Description
相關(guān)PDF資料
PDF描述
V150B36H250BL2 CONVERTER MOD DC/DC 36V 250W
MS27473T22F55S CONN PLUG 55POS STRAIGHT W/SCKT
V150B36H250BF3 CONVERTER MOD DC/DC 36V 250W
ICS951402AGLFT IC TIMING CTRL HUB P4 48-TSSOP
ICL3241ECV IC 3DRVR/5RCVR RS232 3V 28-TSSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY28551 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA, and SIS㈢
CY28551-3 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA and SIS㈢
CY28551LFXC 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Universal System Clk Intel AMD SiS Via RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
CY28551LFXC-3 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Universal System Clk Intel AMD SiS Via RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
CY28551LFXC-3T 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Universal System Clk Intel AMD SiS Via RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*